ak4527b AKM Semiconductor, Inc., ak4527b Datasheet - Page 24

• Manufacturer Part Number: ak4527b
• Description: High Performance Multi-channel Audio Codec
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
n Register Definitions
MS0056-E-00
Addr Register Name
Addr Register Name
00H
01H
SMUTE: Soft Mute Enable
DIF1-0: Audio Data Interface Modes (see table 7.)
ACKS: Master Clock Frequency Auto Setting Mode Enable
DFS: Sampling speed mode (see table 1.)
SDOS: SDTO source select
LOOP1-0: Loopback mode enable
Control 1
Control 2
0: Normal operation
1: All DAC outputs soft-muted
Register bit of SMUTE is ORed with the SMUTE pin if P/S = “L”.
Initial: “10”, mode 2
0: Disable, Manual Setting Mode
1: Enable, Auto Setting Mode
Master clock frequency is detected automatically at ACKS bit “1”. In this case, the setting of DFS are
ignored. When this bit is “0”, DFS sets the sampling speed mode.
0: Normal speed
1: Double speed
Register bit of DFS is ORed with DFS pin if P/S = “L”. The setting of DFS are ignored at ACKS bit “1”.
0: ADC
1: DAUX
Register bit of SDOS is ORed with SDOS pin if P/S = “L”.
00: Normal (No loop back)
01: LIN
10: SDTI1(L)
11: N/A
Register bit of LOOP1 is ORed with LOOP1 pin if P/S = “L”.
default
default
The digital ADC output (DAUX input if SDOS = “1”) is connected to the digital DAC input. In this
mode, the input DAC data to SDTI1-3 is ignored. The audio format of SDTO at loopback mode
becomes mode 2 at mode 0, and mode 3 at mode 1, respectively.
In this mode the input DAC data to SDTI2-3 is ignored.
RIN
SDTI1(R)
LOUT1, LOUT2, LOUT3
ROUT1, ROUT2, ROUT3
SDTI2(L), SDTI3(L)
SDTI2(R), SDTI3(R)
D7
D7
0
0
0
0
D6
D6
0
0
0
0
- 24 -
LOOP1
D5
D5
0
0
0
LOOP0
D4
D4
0
0
0
SDOS
DIF1
D3
D3
1
0
DIF0
DFS
D2
D2
0
0
ACKS
D1
D1
0
0
0
[AK4527B]
SMUTE
2000/10
D0
D0
0
0
0