adf7011 Analog Devices, Inc., adf7011 Datasheet - Page 18

• Manufacturer Part Number: adf7011
• Description: High Performance Ism Band Ask/fsk/gfsk Transmitter Ic
• Manufacturer: Analog Devices, Inc.

ADF7011
Fractional-N
N Counter and Error Correction
The ADF7011 consists of a 15-bit - fractional-N divider.
The N Counter divides the output frequency to the output
stage back to the PFD frequency. It consists of a prescaler,
integer, and fractional part.
The prescaler can be 4/5 or 8/9. A prescaler setting of 8/9 is
recommended for 868 MHz operation. A prescaler setting of
4/5 is recommended for 433 MHz operation.
The output frequency of the PLL is
Fractional-N Registers
The fractional part is made up of a 15-bit divide, made up of a
12-bit N value in the N register summed with a 10-bit value
(plus sign bit) in the R register that is used for error correction,
as shown in Figure 12.
M12 M11 M10
N14 N13 N12 N11 N10
REFERENCE IN
Figure 10. Output Impedance on Smith Chart
PFD Frequency
0.00
0.0
150
R
140
Figure 12. Fractional Components
0.20
M9
130
Figure 11. Fractional-N PLL
0.20
10-BIT (
120
M8
25 – j2.6
433MHz
FRACTIONAL-N
15-BIT FRACTIONAL N REGISTER
CHARGE
PUMP
0.50
PFD/
F10
M7
N9
110
×
0.50
SIGN) ERROR CORRECTION




12-BIT N VALUE
Int
M6
N8
F9
100
868MHz
16 – j33
1.00
+
M5
F8
N7
THIRD ORDER
- MODULATOR
90
(
1.00
8
×
M4
F7
N6
80
Fractional
M3
N5
F6
70
2.00
2
2.00
15
M2
N4
F5
60
INTEGER-N
)
5.00
50
+
M1
F4
N3
VCO
5.00
N
Error
40
F3
N2
30




F2
N1
F1
N0
–18–
The resolution of each register is the smallest amount that the
output frequency can be changed by changing the LSB of the
register.
Changing the Output Frequency
The fractional part of the N register changes the output fre-
quency by
The frequency error correction contained in the R register
changes the output frequency by
By default, this will be set to 0. The user can calibrate the system
and set this by writing a twos complement number to Bits F1–F11
in the R register. This can be used to compensate for initial error,
temperature drift, and aging effects in the crystal reference.
Integer-N Register
The integer part of the N Counter contains the prescaler and A
and B Counters. It is eight bits wide and offers a divide of
P
The combination of the integer (255) and the fractional (31767/
31768) gives a maximum N Divider of 256. The minimum
usable PFD is
For use in the European 868 MHz to 870 MHz band, there is a
restriction to using a minimum PFD of 3.4 MHz to allow the
user to have a center frequency of 870 MHz.
PFD Frequency
The PFD frequency is the number of times a comparison is
made between the reference frequency and the feedback signal
from the output.
The higher the PFD frequency, the more often a comparison is
made at the PFD. This means that the frequency lock time will
be reduced when jumping from one frequency to another by
increasing the PFD. Having a PFD of > 5 MHz will reduce the
available output power due to EN300-220 spurious regulations.
2
+ 3P + 3 to 255.
PFD Frequency Error Correction
PFD Frequency Fractional
Maximum
Re
×
quired Output Frequency
×
(
255 1
2
2
12
15
+
)
Re
gister Value
Re
gister Value
REV. 0