adf7011 Analog Devices, Inc., adf7011 Datasheet
adf7011
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adf7011 Summary of contents
Page 1
... The fractional-N PLL enables the user to select any channel frequency within the European 433 MHz and 868 MHz bands, allowing the use of the ADF7011 in frequency hopping systems. The fractional-N also allows the transmitter to operate in the less congested sub-bands of the 868 MHz to 870 MHz SRD band ...
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... ADF7011–SPECIFICATIONS Parameter RF CHARACTERISTICS Output Frequency Ranges Lower SRD Band Upper SRD Band Phase Frequency Detector Frequency TRANSMISSION PARAMETERS 2 Transmit Rate FSK ASK GFSK Frequency Shift Keying 3 FSK Separation Gaussian Filter t Amplitude Shift Keying Depth On/Off Keying 4 Output Power (No Filtering) 868 MHz ...
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... Mod Control. –3– ADF7011 Unit MHz/V @ 868 MHz dBc/ kHz offset dBc/ MHz offset dBc/ kHz offset dBc/ MHz offset 100 kHz loop BW dBm dBm dBm. Assumes external harmonic filter. dBc dBc dBc MHz ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADF7011 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... TxCLK GFSK Only. This clock output is used to synchronize microcontroller data to the TxDATA pin of the ADF7011. The clock is provided at the same frequency as the data rate. 11 MUXOUT This multiplexer output allows either the digital lock detect (most common), the scaled RF, or the scaled reference frequency to be accessed externally ...
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... ADF7011 Pin No. Mnemonic Function 15 OSC1 Oscillator Pin. For use with crystal reference only. This is three-stated when an external reference oscilla- tor is used. 16 VCO Voltage Controlled Oscillator Ground. GND 17 TEST Input to the RF Fractional-N Divider. This pin allows the user to connect an external VCO to the part. ...
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... THIRD HARMONIC –34dBc START 800MHz RBW 1.0MHz TPC 3. Harmonic Levels at 10 dBm Output Power. See Figure 15. REV. 0 Typical Performance Characteristics–ADF7011 SPAN 5.000MHz –20. kHz, TPC 4. PLL Settling Time, 852 MHz to 878 MHz, DEVIATION ± 400 kHz) SPAN 500kHz RBW 100kHz TPC 5 ...
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... ADF7011 C1 RISE 144.8ns C1 FALL 145.6ns C1 +DUTY 49.385% Ch1 500mV M 200ns TPC 7. 1.6 MHz CLOCK OUT +10dBm PFD FREQUENCY = 19.2MHz LOOP BW = 100kHz RBW = 10Hz +1.6MHz –53dBc 868.3MHz TPC 8. Spurious Signal Generated by CLOCK 0 –5 –10 –15 –20 –25 0.8 0.9 1.0 1.1 FREQUENCY (GHz) TPC 9. N-Divider Input Sensitivity ...
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... FUNCTION REGISTER FAST LOCK MUXOUT DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB16 VP1 CP4 –9– ADF7011 DB8 DB7 DB6 DB5 DB4 DB3 DB2 C2 ( DB8 DB6 DB5 DB4 DB3 ...
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... ADF7011 RF R Register CLK RESERVED OUT DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 R2 R1 CL4 CL3 CL2 CL1 X1 XOE X1 0 XTAL OSCILLATOR ON 1 XTAL OSCILLATOR OFF CL3 CL2 CL1 CL4 ...
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... ADF7011 CONTROL DB3 DB2 DB8 DB7 DB6 DB5 DB4 DB1 (0) C1 (1) - WHILE THE PLL IS AN INTEGER VALUE MODULUS M2 M1 DIVIDE RATIO ...
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... ADF7011 Modulation Register INDEX GFSK MOD COUNTER CONTROL DB23 DB22 DB21 DB20 DB19 DB18 P1 IC2 IC1 MC3 MC2 MC1 IF AMPLITUDE SHIFT KEYING SELECTED, TxDATA = PRESCALER 4/5 1 8/9 D7 ...
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... DIGITAL LOCK DETECT ANALOG LOCK DETECT R DIVIDER / 2 OUTPUT N DIVIDER / 2 OUTPUT RF R DIVIDER OUTPUT RF N DIVIDER OUTPUT DATA RATE LOGIC LOW LOGIC LOW LOGIC LOW NORMAL TEST MODES - TEST MODES –13– ADF7011 CHARGE PUMP DB8 DB7 DB6 DB5 DB4 DB3 DB2 CP3 C2 C1 ...
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... ADF7011 Default Values for Registers RESERVED CLK OUT DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB23 DB22 8-BIT INTEGER-N DB23 DB22 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB21 ...
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... CLK OUT The PFD includes a delay element that sets the width of the antibacklash pulse. The typical value for this in the ADF7011 is 3 ns. This pulse ensures that there is no dead zone in the PFD transfer function and minimizes phase noise and reference spurs. ...
Page 16
... When lock has been detected, this output will be high with narrow low-going pulses. Voltage Regulator The ADF7011 requires a stable voltage source for the VCO and modulation blocks. The on-board regulator provides 2.2 V using a band gap reference. A 2.2 µF capacitor from C ground is used to improve stability of the regulator over a sup- ply ranging from 2 ...
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... LE. The destination latch is deter- mined by the value of the two control bits (C2 and C1). These are the two LSBs, DB1 and DB0, as shown in the timing dia- gram of Figure 1. Figure 9. Output Stage Matching –17– ADF7011 LOW MED HIGH P1 P7, P6 Figure 8 ...
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... Figure 10. Output Impedance on Smith Chart Fractional-N N Counter and Error Correction The ADF7011 consists of a 15-bit - fractional-N divider. The N Counter divides the output frequency to the output stage back to the PFD frequency. It consists of a prescaler, integer, and fractional part. The prescaler can be 4/5 or 8/9. A prescaler setting of 8/9 is recommended for 868 MHz operation ...
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... Gaussian Frequency Shift Keying (GFSK) Gaussian frequency shift keying reduces the bandwidth occupied by the transmitted spectrum by digitally prefiltering the TxDATA. A TxCLK output line is provided from the ADF7011 for syn- chronization of TxDATA from the microcontroller. The TxCLK line may be connected to the clock input of an external shift register that clocks data to the transmitter at exact data rate ...
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... Given that the insertion loss necessary to use the maximum +12 dBm power from the ADF7011 to achieve an antenna port level of +10 dBm. The filter layout is important to ensure that there is margin in the output spectrum; filter data sheet guidelines should be adhered to. – ...
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... DD DD VCO REG R SET 12nH RF OUT CP VCO OUT IN ADF7011 TxDATA LE CLK OSC2 DATA 22.1184MHz CE OSC1 MUXOUT CLK TEST GND OUT 50 DECOUPLING CAPACITORS HAVE BEEN OMITTED FOR CLARITY. –21– ADF7011 10pF 6.8nH LC FILTER 3.9pF 33pF 33pF 10pF 6.8nH 33pF 33pF ...
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... Figure 17. Application Diagram—868 MHz Operation with +10 dBm Output Power 2.2 F 220nF CPV VCO REG R SET 12nH RF OUT CP VCO OUT IN ADF7011 TxDATA LE CLK OSC2 DATA 22.1184MHz OSC1 CE MUXOUT CLK TEST GND OUT 50 DECOUPLING CAPACITORS HAVE BEEN OMITTED FOR CLARITY. –22– 10pF 6.8nH ...
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... Thin Shrink Small Outline Package [TSSOP] PIN 1 0.15 0.05 REV. 0 OUTLINE DIMENSIONS (RU-24) Dimensions shown in millimeters 7.90 7.80 7. 4.50 4.40 4.30 6.40 BSC 1 12 0.65 1.20 BSC MAX 8 0.30 0 0.20 SEATING 0.19 PLANE 0.09 0.10 COPLANARITY COMPLIANT TO JEDEC STANDARDS MO-153AD –23– ADF7011 0.75 0.60 0.45 ...
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