74HCT00N,652 NXP Semiconductors, 74HCT00N,652 Datasheet - Page 2

• Manufacturer Part Number: 74HCT00N,652
• Description: IC GATE NAND QUAD 2INPUT 14DIP
• Manufacturer: NXP Semiconductors
• Series: 74HCTr

Specifications of 74HCT00N,652

• Number Of Circuits: 4
• Package / Case: 14-DIP (0.300", 7.62mm)
• Logic Type: NAND Gate
• Number Of Inputs: 2
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Product: NAND
• Logic Family: 74HCT
• Propagation Delay Time: 10 ns
• Maximum Operating Temperature: 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: -40 C
• Logical Function: NAND
• Number Of Elements: 4
• High Level Output Current: -4mA
• Low Level Output Current: 4mA
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 125C
• Package Type: PDIP
• Number Of Outputs: 1
• Technology: CMOS
• Mounting: Through Hole
• Pin Count: 14
• Operating Temperature Classification: Automotive
• Quiescent Current: 40uA
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1499-5; 74HCT00N; 933668880652

NXP Semiconductors
4. Functional diagram
5. Pinning information
Table 2.
74HC_HCT00
Product data sheet
Symbol
1A to 4A
1B to 4B
Fig 1.
Fig 4.
Logic symbol
Pin configuration DIP14, SO14 and (T)SSOP14
10
12
13
GND
Pin description
1
2
4
5
9
1A
1B
1Y
2A
2B
2Y
1A
1B
2A
2B
3A
3B
4A
4B
1
2
3
4
5
6
7
5.1 Pinning
5.2 Pin description
Pin
1, 4, 9, 12
2, 5, 10, 13
mna212
1Y
2Y
3Y
4Y
74HCT00
74HC00
11
3
6
8
001aal323
Description
data input
data input
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Fig 2.
14
13
12
11
10
9
8
V
4B
4A
4Y
3B
3A
3Y
CC
Rev. 5 — 25 November 2010
IEC logic symbol
10
12
13
1
2
4
5
9
mna246
&
&
&
&
Fig 5.
3
6
8
11
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Pin configuration DHVQFN14
index area
terminal 1
74HC00; 74HCT00
1B
1Y
2A
2B
2Y
Fig 3.
Transparent top view
2
3
4
5
6
A
B
74HCT00
74HC00
GND
Logic diagram (one gate)
Quad 2-input NAND gate
(1)
001aal324
13
12
11
10
9
© NXP B.V. 2010. All rights reserved.
4B
4A
4Y
3B
3A
mna211
Y
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