74HCT32N,652 NXP Semiconductors, 74HCT32N,652 Datasheet - Page 2

IC GATE OR QUAD 2IN HS SI 14DIP

74HCT32N,652

Manufacturer Part Number
74HCT32N,652
Description
IC GATE OR QUAD 2IN HS SI 14DIP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT32N,652

Number Of Circuits
4
Package / Case
14-DIP (0.300", 7.62mm)
Logic Type
OR Gate
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Product
OR
Logic Family
74HCT
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
11 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1537-5
74HCT32N
933668960652
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For 74HC32 the condition is V
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
2003 Dec 12
t
C
C
PHL
Wide supply voltage range from 2.0 to 6.0 V
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
I
PD
Quad 2-input OR gate
SYMBOL
P
f
f
C
V
N = total load switching outputs;
For 74HCT32 the condition is V
L = LOW voltage level.
i
o
/t
(C
D
CC
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts;
PD
V
CC
amb
2
V
CC
= 25 C; t
propagation delay nA, nB to nY
input capacitance
power dissipation capacitance per gate
nA
f
H
H
o
L
L
2
) = sum of the outputs.
f
i
N + (C
r
= t
f
= 6 ns.
PARAMETER
I
L
= GND to V
I
INPUT
= GND to V
V
CC
2
f
o
CC
) where:
CC
.
1.5 V.
nB
H
H
L
L
2
GENERAL DESCRIPTION
The 74HC/HCT32 is a high-speed Si-gate CMOS device
and is pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT32 provides the 2-input OR function.
C
notes 1 and 2
D
L
in W).
= 15 pF; V
CONDITIONS
CC
= 5 V
74HC32; 74HCT32
6
3.5
16
HC
TYPICAL
OUTPUT
Product specification
nY
9
3.5
28
H
H
H
L
HCT
ns
pF
pF
UNIT

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