vrs51c1000 Ramtron Corporation, vrs51c1000 Datasheet - Page 15

• Manufacturer Part Number: vrs51c1000
• Description: Versa 8051 Mcu With 64kb Of Iap/isp Flash
• Manufacturer: Ramtron Corporation

F
The following table describes the auxiliary function of
the Port 3 I/O pins.
T
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Internal Bus
IGURE
ABLE
Pin
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Write to
Register
VRS51C1000
Read Register
22: P3 A
9: P3 P
Read Pin
Mnemonic
RXD
TXD
INT0
INT1
T0
T1
WR
RD
ORT
UXILIARY
S
TRUCTURE
F
UNCTION
D Flip-Flop
Function: Input
T
Function
Serial Port:
Receive data in asynchronous mode.
Input and output data in synchronous
mode.
Serial Port:
Transmit data in asynchronous mode.
Output clock value in synchronous mode.
External Interrupt 0
Timer 0 Control Input
External Interrupt 1
Timer 1 Control Input
Timer 0 Counter Input
Timer 1 Counter Input
Write signal for external memory
Read signal for external memory
Auxiliary
Q
Q
ABLE
Function: Output
Auxiliary
Vcc
X1
IC Pin
Port 4
Port 4 has four related I/O pins and its port address is
located at 0D8H.
T
On the VRS51C1000, the Port 4 output buffers can
sink up to 20mA, which allow direct drive of LED
displays.
Software Port Control
Some instructions allow the user to read the logic state
of the output pin, while others allow the user to read
the content of the associated port register. These
instructions are called read-modify-write instructions. A
list of these instructions may be found in the table
below.
Upon execution of these instructions, the content of the
port register (at least 1 bit) is modified. The other read
instructions take the present state of the input into
account. For example, the instruction ANL P3,#01h
obtains the value in the P3 register; performs the
desired logic operation with the constant 01h; and re-
copies the result into the P3 register. When users want
to take the present state of the inputs into account,
they must first read these states and perform an AND
operation between the read value and the constant.
ABLE
Bit
7
6
5
4
3
2
1
0
MOV A, P3; State of the inputs in the accumulator
ANL A, #01; AND operation between P3 and 01h
7
23: P
ORT
Mnemonic
Unused
Unused
Unused
Unused
P4.3
P4.2
P4.1
P4.0
6
4 (P4) - SFR D8
Unused
5
Description
-
-
-
-
Used to output the setting to pins P4.3,
P4.2, P4.1, P4.0 respectively.
H
4
P4.3
3
page 15 of 48
P4.2
2
P4.1
1
P4.0
0