as7c34098a Alliance Memory, Inc, as7c34098a Datasheet - Page 5

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as7c34098a

Manufacturer Part Number
as7c34098a
Description
3.3 V 256 K ? 16 Cmos Sram
Manufacturer
Alliance Memory, Inc
Datasheet

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Read waveform 2 (CE, OE, UB, LB controlled)
Write cycle (over the operating range)
Write cycle time
Chip enable (CE) to write end
Address setup to write end
Address setup time
Write pulse width (OE = High)
Write pulse width (OE = Low)
Write recovery time
Address hold from end of write
Data valid to write end
Data hold time
Write enable to output in High-Z
Output active from write end
Byte enable Low to write end
8/17/04,v. 2.1
Data
Address
LB, UB
OUT
OE
CE
Parameter
Symbol
t
t
t
t
OLZ
BLZ
t
t
t
t
t
t
t
t
t
t
t
WP1
WP2
DW
OW
WC
CW
AW
WR
WZ
BW
AH
DH
AS
Alliance Memory Inc
t
Min
CLZ
10
10
10
7
7
0
7
0
0
5
0
0
3
7
–10
t
t
ACE
AA
Max
t
t
OE
BA
5
6,8,9
Min
12
12
8
8
0
8
0
0
6
0
0
3
8
t
®
RC
–12
Max
6
Data valid
Min
15
10
10
10
15
10
0
0
0
7
0
0
3
–15
Max
7
t
t
Min
OH
CHZ
20
12
12
12
20
12
0
0
0
9
0
0
3
t
t
BHZ
OHZ
–20
Max
9
AS7C34098A
P. 5 of 10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
4, 5
4, 5
4, 5
4, 5

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