m52d64322a Elite Semiconductor Memory Technology Inc., m52d64322a Datasheet - Page 40

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m52d64322a

Manufacturer Part Number
m52d64322a
Description
512k X 32 Bit X 4 Banks Mobile Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
ESMT
Write interrupted by Precharge Command & Write Burst Stop Cycle @ Burst Length = Full page
*Note : 1. Data-in at the cycle of interrupted by precharge can not be written into the corresponding memory cell. It is defined by
Elite Semiconductor Memory Technology Inc.
2. Burst stop is valid at every burst length.
AC parameter of t
DQM at write interrupted by precharge command is needed to prevent invalid write.
DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst. Input
data after Row precharge cycle will be masked internally.
RDL
.
Publication Date: Jan. 2009
Revision: 1.4
M52D64322A
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