ox16pci954 ETC-unknow, ox16pci954 Datasheet - Page 62

• Manufacturer Part Number: ox16pci954
• Description: Integrated Quad Uart Interface
• Manufacturer: ETC-unknow

13.3 Serial ports
Isochronous (x1 Clock) Timing:
Note 1:
Data Sheet Revision 1.3
OXFORD SEMICONDUCTOR LTD.
t
t
t
Symbol
Symbol
Symbol
irs
irh
its
t
t
t
t
vt
t
t
t
t
zwds1
zwds2
t
t
zrds1
zrds2
t
t
t
t
t
t
t
t
t
t
t
zw1
zw2
wds
dsw
dsdi
ads
zd1
zd2
ads
zdv
zdf
ref
za
sd
hd
ref
za
drd
In Isochronous mode, transmitter data is available after the falling edge of the x1 clock and the receiver data is sampled using the rising edge of the
x1 clock. The system designer is should ensure that mark-to-space ratio of the x1 clock is such that the required set-up and hold timing constraint
are met. One way of achieving this is to choose a crystal frequency which is twice the required data rate and then divide the clock by two using the
on-board prescaler. In this case the mark-to-space ratio is 50/50 for the purpose of set-up and hold calculations.
Parameter
IRDY# falling to reference LBCLK
Reference LBCLK to Address Valid
Address Valid to LBDS# falling
Reference LBCLK to LBDS# falling
Reference LBCLK to LBDS# rising
Data bus floating to LBDS# falling
Reference LBCLK to data bus floating at the start of the read
transaction
Reference LBCLK to data bus driven by OX16PCI954 at the end of the
read transaction
Data bus valid to LBDS# rising
Data bus valid after LBDS# rising
Parameter
IRDY# falling to reference LBCLK
Reference LBCLK to Address Valid
Address Valid to LBDS# falling
Reference LBCLK to LBRDWR# falling
Reference LBCLK to LBRDWR# rising
LBRDWR# falling to LBDS# falling
LBDS# rising to LBRDWR# rising
Reference LBCLK to LBDS# falling
Reference LBCLK to LBDS# rising
Reference LBCLK to data bus valid
Reference LBCLK to data bus high-impedance
LBDS# rising to data bus invalid
Parameter
SIN set-up time to Isochronous input clock ‘Rx_Clk_In rising
SIN hold time after Isochronous input clock ‘Rx_Clk_In’ rising
SOUT valid after Isochronous output clock ‘Tx_Clk_Out’ falling
Table 44: Read operation from Motorola-type Local Bus
Table 45: Write operation to Motorola-type Local Bus
Table 46: Isochronous mode timing
1
1
1
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Min
Nominally 2 PCI clock cycles
Min
Nominally 2 PCI clock cycles
Min
Max
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Max
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Max
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OX16PCI954
Units
Units
Units
Page 62
ns
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