zl2006 Intersil Corporation, zl2006 Datasheet - Page 35

• Manufacturer Part Number: zl2006
• Description: Adaptive Digital Dc-dc Controller With Drivers And Current Sharing
• Manufacturer: Intersil Corporation

Using this method, the user can theoretically configure
up to 625 unique SMBus addresses, however the
SMBus is inherently limited to 128 devices so
attempting to configure an address higher than 128
(0x80) will cause the device address to repeat (i.e,
attempting to configure a device address of 129 (0x81)
would result in a device address of 1). Therefore, the
user should use index values 0-4 on the SA1 pin and
the full range of index values on the SA0 pin, which
will provide 125 device address combinations.
Table 28. SMBus Address Index Values
To determine the SA0 and SA1 resistor values given an
SMBus address (in decimal), follow the steps below to
calculate an index value and then use Table 28 to select
the resistor that corresponds to the calculated index
value as follows:
1. Calculate SA1 Index:
2. Round the result down to the nearest whole number.
3. Select the value of R1 from Table 28 using the SA1
4. Calculate SA0 Index:
5. Select the value of R0 from Table 28 using the SA0
12.1 kΩ
13.3 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
19.6 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
28.7 kΩ
31.6 kΩ
Index rounded value from step 2.
Index value from step 4.
10 kΩ
11 kΩ
SA1 Index = Address (in decimal) ÷ 25
SA0 Index = Address – (25 x SA1 Index)
R
SA
SA0 or
Index
SA1
10
11
12
0
1
2
3
4
5
6
7
8
9
35
34.8 kΩ
38.3 kΩ
42.2 kΩ
46.4 kΩ
51.1 kΩ
56.2 kΩ
61.9 kΩ
68.1 kΩ
82.5 kΩ
90.9 kΩ
100 kΩ
75 kΩ
R
SA
SA0 or
Index
SA1
13
14
15
16
17
18
19
20
21
22
23
24
ZL2006
6.10 Digital-DC Bus
The Digital-DC (DDC) communications bus is used to
communicate between Zilker Labs Digital-DC devices.
This dedicated bus provides the communication
channel between devices for features such as
sequencing, fault spreading, and current sharing. The
DDC pin on all Digital-DC devices in an application
should be connected together. A pull-up resistor is
required on the DDC bus in order to guarantee the rise
time as follows:
Rise time = R
where R
C
tied to VR or to an external 3.3 V or 5 V supply as long
as this voltage is present prior to or during device
power-up. As rules of thumb, each device connected to
the DDC bus presents approx 10 pF of capacitive
loading, and each inch of FR4 PCB trace introduces
approx 2 pF. The ideal design will use a central pull-up
resistor that is well-matched to the total load
capacitance. In power module applications, the user
should consider whether to place the pull-up resistor on
the module or on the PCB of the end application. The
minimum pull-up resistance should be limited to a
value that enables any device to assert the bus to a
voltage that will ensure a logic 0 (typically 0.8 V at the
device monitoring point) given the pull-up voltage (5
V if tied to VR) and the pull-down current capability of
the ZL2006 (nominally 4 mA).
6.11 Phase Spreading
When multiple point of load converters share a
common DC input supply, it is desirable to adjust the
clock phase offset of each device such that not all
devices start to switch simultaneously. Setting each
converter to start its switching cycle at a different point
in time can dramatically reduce input capacitance
requirements and efficiency losses. Since the peak
current drawn from the input supply is effectively
spread out over a period of time, the peak current
drawn at any given moment is reduced and the power
losses
dramatically.
LOAD
is the bus loading. The pull-up resistor may be
proportional
PU
is the DDC bus pull-up resistance and
PU
* C
LOAD
to
≈ 1 µs,
the
I
RMS
December 15, 2010
2
are
FN6850.1
reduced