m24lr64-r STMicroelectronics, m24lr64-r Datasheet - Page 15

• Manufacturer Part Number: m24lr64-r
• Description: 64 Kbit Eeprom With Password Protection & Dual Interface 400 Khz I?c Serial Bus & Iso 15693 Rf Protocol At 13.56 Mhz
• Manufacturer: STMicroelectronics

M24LR64-R
2.6
2.6.1
2.6.2
2.6.3
2.6.4
Supply voltage (V
Operating supply voltage V
Prior to selecting the memory and issuing instructions to it, a valid and stable V
within the specified [V
secure a stable DC supply voltage, it is recommended to decouple the V
suitable capacitor (usually of the order of 10 nF to 100 nF) close to the V
pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal I²C write cycle (t
Power-up conditions
When the power supply is turned on, V
vary faster than 1V/µs.
Device reset
In order to prevent inadvertent write operations during power-up, a power-on reset (POR)
circuit is included. At power-up (continuous rise of V
instruction until V
lower than the minimum V
over the POR threshold, the device is reset and enters the Standby Power mode, however,
the device must not be accessed until V
within the specified [V
In a similar way, during power-down (continuous decrease in V
below the power-on reset threshold voltage, the device stops responding to any instruction
sent to it.
Power-down conditions
During power-down (continuous decay of V
(mode reached after decoding a Stop condition, assuming that there is no internal write
cycle in progress).
Figure 4.
100
10
4 kΩ
1
10
Here R bus × C bus = 120 ns
I
capacitance (C
2
C Fast mode (f
CC
30 pF
has reached the power-on reset threshold voltage (this threshold is
CC
CC
Bus line capacitor (pF)
(min), V
(min), V
CC
CC
100
bus
operating voltage defined in
)
C
Doc ID 15170 Rev 9
CC
= 400 kHz): maximum R
)
CC
(max)] range must be applied (see
CC
(max)] range.
CC
CC
rises from V
has reached a valid and stable V
CC
), the device must be in Standby Power mode
1000
When t
f
time constant must be below the
400 ns time constant line
represented on the left.
C
= 400 kHz), the R bus × C bus
CC
LOW
SS
), the device does not respond to any
= 1.3 µs (min value for
to V
bus
Table
CC
value versus bus parasitic
CC
. The V
100). When V
), as soon as V
I²C bus
master
Table
CC
Signal description
CC
CC
rise time must not
SCL
SDA
/V
100). In order to
line with a
CC
SS
CC
V
W
CC
voltage
CC
).
CC
package
R
C
passes
bus
bus
voltage
drops
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