isppac30 Lattice Semiconductor Corp., isppac30 Datasheet - Page 22

• Manufacturer Part Number: isppac30
• Description: In-system Programmable Analog Circuit
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
ispPAC30 Data Sheet
output relationships determined by the current circuit configuration, or in the case of initial turn-on, the stored con-
figuration of the device. During the auto-calibration sequence, the output amplifiers are driven to 0V and any offset
error from input to output is calibrated out during a successive-approximation sequence using an internal offset cal-
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ibration DAC. This calibration setting is not stored in E
, hence the need to perform calibration every time the device
is powered on. The ground reference for auto-calibration is the SCOM pin. The SCOM pin must be connected to
the GND pin (0V), preferably in a ground plane. Since SCOM must be at, or very near the same potential as GND,
connection to any other point is not recommended.
In addition to the automatic power-on calibration, an auto-calibration sequence can be commanded at any time
using the external CAL logic pin, or by issuing an ENCAL command via the JTAG or SPI serial interface. The timing
and length of the auto-calibration sequence is called out in the specification tables of this data sheet.
Note: Two options are available for calibrating each of the four input IA’s and two MDACs, with respect to what input
level is used for auto-calibration. Normally, the inputs are calibrated with a 0V input reference (the default setting).
But when the input common mode voltage is recognized to be closer to 2.5V, the user can specify that 2.5V be set
as the input calibration level. The IA/MDAC inputs can be set to use any combination of 0V or 2.5V as their auto-cal
common-mode reference. This allows the least amount of common-mode error to enter into the offset adjustment,
dependent on the user’s predetermined operating conditions.
SPI vs. JTAG Operation
The JTAG serial interface is usually sufficient for programming the ispPAC30, but complete support is also provided
for the Serial Peripheral Interface (SPI) mode as well. SPI is often chosen when an embedded µController or
µProcessor is used to actively control and configure an ispPAC30 in-system. SPI mode can be enabled via the
logic level setting of the ENSPI pin. To achieve full control of an ispPAC30, all possible bits used in configuration
(112) must be set each time the configuration is updated. This full set of configuration bits is referred to as the CFG
or configuration register. There is also a shorter configuration register called the CFGQ or quick configuration reg-
ister (40 bits). Here, only the bits most often used in reconfiguration are accessed. Less commonly used bits, such
as those which determine routing, are left out to simplify and speed up the serial transfer of data. Detailed informa-
tion about SPI mode operation is found in application note AN6027, which is devoted entirely to the subject of SPI
control.
Software-Based Design Environment
Design Entry Software
Designers configure the ispPAC30 and verify its performance using PAC-Designer, an easy to use, Microsoft Win-
dows compatible program. Circuit designs are entered graphically and then verified, all within the PAC-Designer
environment. Full device programming is supported using PC parallel port I/O operations and a download cable
connected to the serial programming interface pins of the ispPAC30. A library of configurations is included with
basic solutions and examples of advanced circuit techniques are available on the Lattice web site for downloading.
In addition, comprehensive on-line and printed documentation is provided that covers all aspects of PAC-Designer
operation.
The PAC-Designer schematic window, shown below in Figure 6, provides access to all configurable ispPAC30 ele-
ments via its graphical user interface. All analog input and output pins are represented. Static or non-configurable
pins such as power, ground, VREFOUT, and the serial digital interface are omitted for clarity. Any element in the
schematic window can be accessed via mouse operations as well as menu commands. When completed, configu-
rations can be saved, simulated, and downloaded to devices.
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