isppac30 Lattice Semiconductor Corp., isppac30 Datasheet - Page 20

• Manufacturer Part Number: isppac30
• Description: In-system Programmable Analog Circuit
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Table 3. Precision Filter Configuration Ranges
Power-Down Mode
The ispPAC30 features a power-down mode whereby the current consumption of the device is reduced to a few
microamps. In this mode, the logic sections of the device are still fully active, but draw very little power. This means
communication can be maintained with the device while it is in the powered-down state. In the analog sections, the
bias currents are reduced or turned off and all sections that can be, are shut down. The analog outputs go to a high
impedance state in power-down mode. The maximum current in shutdown mode and the time required to resume
normal operation all are specified in the specifications section of this data sheet. Programming or erasing of the E
configuration memory is not supported when an ispPAC30 is powered down. Power-down mode is commanded by
lowering the PD pin to a logic low, or by commanding it through JTAG or SPI serial mode commands.
In addition to full power-down mode, either of the output amplifiers can be shut down independently of all other cir-
cuitry. This can be done at any time by setting internal E
sumption while the rest of the ispPAC30 is in normal operation. This could also be accomplished at the time the
device is programmed initially via dialog box commands available in the PAC-Designer software. Note: Any IA or
MDAC that has nothing connected to its input is also automatically shut down.
JTAG User Configurable Bits
There are a number of user-configured E
somewhere in either the pull-down menus or directly in the schematic design entry screen of the PAC-Designer soft-
ware used to interface to the ispPAC30. See the online help associated with the ispPAC30 in PAC-Designer for more
details of how to set/program various operation modes. The list of control E
Capacitor #
Feedback
1
2
3
4
5
6
7
Capacitor Value (pF)
OA1 Feedback
4.320pF
7.156pF
11.97pF
18.16pF
27.29pF
42.37pF
64.01pF
2
bits that control all aspects of ispPAC30. These bits can all be accessed
Minimum Corner
Frequency (kHz)
63
41
25
17
11
20
7
5
2
bits under JTAG or SPI command to reduce power con-
Maximum Corner
Frequency (kHz)
2
619
401
250
169
114
bits available are listed in Tables 4 and 5.
74
49
ispPAC30 Data Sheet
Frequency Step
(kHz)
4.86
3.13
1.95
1.31
0.88
0.58
0.38
2