wm8325gefl/v Wolfson Microelectronics plc, wm8325gefl/v Datasheet - Page 14

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wm8325gefl/v

Manufacturer Part Number
wm8325gefl/v
Description
Processor Power Management Subsystem
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8325
w
Figure 2 Power States and Transitions
State transitions to/from the NO POWER state are controlled automatically by the internal supply
(VPMIC) voltage generated by LDO12. The device is in the NO POWER state when this voltage is
below the Power-On Reset (POR) threshold.
State transitions to/from the BACKUP state are controlled automatically by the internal supply
(VPMIC) voltage generated by LDO12. The device is in the BACKUP state when this voltage is below
the Device Reset threshold.
State transitions to/from the PROGRAM state are required to follow specific control sequences.
The remaining transitions between the OFF, ON and SLEEP states may be initiated by a number of
different mechanisms - some of them automatic, some of them user-controlled. Transitions between
these states are time-controlled sequences of events are programmable, using data stored in the
integrated OTP memory or else data loaded from an external InstantConfig
memory.
Product Brief, February 2011, Rev 1.4
TM
EEPROM (ICE)
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