wm8593seft-v Wolfson Microelectronics plc, wm8593seft-v Datasheet - Page 54

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wm8593seft-v

Manufacturer Part Number
wm8593seft-v
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8593
w
UPDATE FUNCTION
To prevent clock contention issues during setup of the digital audio interface mux, an update system
has been implemented. This allows the registers to be configured as required and the update to be
applied with the last register write synchronise the configuration of the digital audio mux. An update
can be generated using any of the update bits shown in Table 40.
DETAILS ON CLOCK SWITCHING
In order to avoid short clock pulses (glitches) when switching between two independent clock
sources, the MCLK and BCLK switching is carefully controlled within the WM8593 using various
feedback and logic mechanisms. This controlled switching applies to all MCLK and BCLK digital
audio port pins, and also when switching MCLK and BCLK sources in the ADC, DAC1 and DAC2
audio interfaces.
Example: Switching from MCLK2 to MCLK3 using the MCLK4 pin
CLK_A is applied to the MCLK2 pin, and CLK_B is applied to the MCLK3 pin.
MCLK4_SEL[2:0]=001, so CLK_A is output on the MCLK4 pin. To change the output clock to
CLK_B, set MCLK4_SEL[2:0]=010. The logic waits until CLK_A (MCLK2 pin) is low then disconnects
CLK_A from the output (MCLK4) pin. The output pin (MCLK4) now outputs logic 0 for two rising
edges of CLK_B (MCLK3 pin) before starting to output CLK_B. This behaviour is shown in Figure
25:
Table 40 Audio Interface Mux Update Bits
REGISTER
ADDRESS
AIF_MUX1
AIF_MUX2
AIF_MUX3
AIF_MUX4
AIF_MUX5
AIF_MUX6
AIF_MUX7
AIF_MUX8
R37
R38
R39
R40
R41
R42
2Ah
R43
2Bh
R44
2Ch
25h
26h
27h
28h
29h
BIT
10
10
10
10
10
10
10
10
PORT1_
PORT2_
PORT3_
PORT4_
PORT5_
LABEL
DAC1_
DAC2_
ADC_
UPD
UPD
UPD
UPD
UPD
UPD
UPD
UPD
DEFAULT
0
Update
0 = Latch corresponding settings into
Register Map but do not update
1 = Latch corresponding settings into
Register Map and update all simultaneously
DESCRIPTION
PD Rev 4.0 April 2008
Pre-Production
Initially,
54

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