wm9090 Wolfson Microelectronics plc, wm9090 Datasheet - Page 44
wm9090
Manufacturer Part Number
wm9090
Description
Ultra Low Power Audio Subsystem
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM9090.pdf
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WM9090
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CHARGE PUMP
The WM9090 incorporates a dual-mode Charge Pump which generates the supply rails for the
headphone output drivers, HPOUT1L and HPOUT1R. The Charge Pump has a single supply input,
AVDD, and generates split rails CPVOUTP and CPVOUTN according to the selected mode of
operation. The Charge Pump connections are illustrated in Figure 16 (see “Electrical Characteristics”
for external component values). An input decoupling capacitor may also be required at AVDD,
depending upon the system configuration.
Figure 16 Charge Pump External Connections
The Charge Pump is enabled by setting the CP_ENA bit. When enabled, the charge pump adjusts
the output voltages (CPVOUTP and CPVOUTN) as well as the switching frequency in order to
optimise the power consumption according to the operating conditions.
The Charge Pump mode of operation is selected automatically according to the HPOUT1L_VOL and
HPOUT1R_VOL register settings.
Under the recommended usage conditions of the WM9090, the Charge Pump will be enabled by
running the default headphone Start-Up sequence as described in the “Control Write Sequencer”
section. (Similarly, it will be disabled by running the Shut-Down sequence.) In these cases, the user
does not need to write to the CP_ENA bit.
Note that the charge pump clock is derived from internal clock CLK_SYS which must be enabled by
setting OSC_ENA (see “Clocking Control”). The clock division from CLK_SYS is handled
transparently by the WM9090 without user intervention.
The CP_ENA register bit is defined in Table 27.
Table 27 Charge Pump Control
R76 (4Ch)
Charge Pump
1
REGISTER
ADDRESS
BIT
15
CP_ENA
LABEL
DEFAULT
0
Charge Pump Control
0 = Disabled
1 = Enabled
PP, January 2010, Rev 3.0
DESCRIPTION
Pre-Production
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