xwm8722eds ETC-unknow, xwm8722eds Datasheet - Page 11

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xwm8722eds

Manufacturer Part Number
xwm8722eds
Description
Stereo Dac With Integrated Tone Generator And Line/variable Level Outputs
Manufacturer
ETC-unknow
Datasheet
WM8722
AUDIO DATA INTERFACE
Table 1 System Clock Frequencies versus Sampling Rate
The serial data interface to WM8722 is fully compatible with both normal (MSB first, right-justified) or
I
number of data bits, i.e. normally 32 in 16 bit mode) or unpacked (more than 32 BCLKs per LRCIN
period.
The WM8722 will automatically detect 16-bit packed data being sent to the device in normal mode,
and accept the data in this input format accordingly.
Table 2 Serial Interface Formats
Figure 5 Normal Data Input Timing
Figure 6 I
2
S interfaces. Data may be packed (number of serial BLCKS per LRCIN period is exactly 2 times the
LRCIN
BCKIN
DIN
LRCIN
BCKIN
DIN
SAMPLING RATE
(LRCIN)
44.1kHz
I
2
32kHz
48kHz
96kHz
2
S Data Input Timing
S MODE
0
1
MSB
1
2
3
MSB
LEFT CHANNEL
LEFT CHANNEL
SYSTEM CLOCK FREQUENCY (MHZ)
1
11.2896
2
12.288
24.576
256fs
8.192
3
n-2
n-1
LSB
Normal format (MSB-first, right justified)
I
n
2
S format (Philips serial data protocol )
n-2
n-1
n
1/fs
1/fs
LSB
DESCRIPTION
16.9340
12.288
18.432
36.864
384fs
1
MSB
2
3
MSB
1
RIGHT CHANNEL
RIGHT CHANNEL
2
3
n-2
AI Rev 2.1 June 2001
Advanced Information
n-1
LSB
n
n-2
n-1
n
LSB
11

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