wm8903 Wolfson Microelectronics plc, wm8903 Datasheet - Page 77

• Manufacturer Part Number: wm8903
• Description: Ultra Low Power Codec For Portable Audio Applications
• Manufacturer: Wolfson Microelectronics plc

Pre-Production
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BCLK_DIV and LRCLK_RATE are defined in Table 52. The clocking scheme is illustrated in the
“Clocking and Sample Rates” section - see Figure 54.
Table 52 Digital Audio Interface Clock Output Control
AUDIO DATA FORMATS
Four basic audio data formats are supported:
•
•
•
•
All four of these modes are MSB first. They are described in Audio Data Formats, below. Refer to the
Electrical Characteristic section for timing information.
Time Division Multiplexing (TDM) is available in all four data format modes. The WM8903 can be
programmed to send and receive data in one of two time slots.
PCM operation is supported using the DSP mode.
R26 (1Ah)
Audio
Interface 2
R27 (1Bh)
Audio
Interface 3
REGISTER
ADDRESS
Left justified
Right justified
I
DSP mode
2
S
10:0
BIT
4:0
BCLK_DIV [4:0]
LRCLK_RATE
[10:0]
LABEL
000_0010
DEFAULT
0_1000
_0010
BCLK Frequency (Master Mode)
00000 = CLK_SYS
00001 = Reserved
00010 = CLK_SYS / 2
00011 = CLK_SYS / 3
00100 = CLK_SYS / 4
00101 = CLK_SYS / 5
00110 = Reserved
00111 = CLK_SYS / 6
01000 = CLK_SYS / 8 (default)
01001 = CLK_SYS / 10
01010 = Reserved
01011 = CLK_SYS / 12
01100 = CLK_SYS / 16
01101 = CLK_SYS / 20
01110 = CLK_SYS / 22
01111 = CLK_SYS / 24
10000 = Reserved
10001 = CLK_SYS / 30
10010 = CLK_SYS / 32
10011 = CLK_SYS / 44
10100 = CLK_SYS / 48
LRC Rate (Master Mode)
LRC clock output = BCLK /
LRCLK_RATE
Integer (LSB = 1)
Valid range: 8 to 2047
50:50 LRCLK duty cycle is only
guaranteed with even values (8, 10,
… … , 2047).
PP, Rev 3.1, August 2009
DESCRIPTION
WM8903
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