pt7a4402b Pericom Technology Inc, pt7a4402b Datasheet - Page 14

• Manufacturer Part Number: pt7a4402b
• Description: T1/e1 System Synchronizer
• Manufacturer: Pericom Technology Inc

| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
Applications Information
Master Clock
The PT7A4402B/4402L uses either an external clock source or
an external crystal as the master timing source.
In Free-Run State, the frequency tolerance of the PT7A4402B/
4402L output clocks are equal to the frequency tolerance of the
timing source. In an application, if an accurate Free-Run State is
not required, the tolerance of the master timing source may be
100ppm. If required, the tolerance must be no greater than 32ppm.
The capture range of PT7A4402B/4402L will also be considered
when deciding the accuracy of the master timing source. The
sum of the accuracy of the master timing source and the cap-
ture range of the PT7A4402B/4402L will always equal 230ppm.
For example, if the master timing source is 100ppm, the capture
range will be 130ppm.
• Clock Oscillator
If using an external clock source, its output pin should be con-
nected directly (not AC coupled) to the OSCi pin of the
PT7A4402B/4402L and the OSCo pin of PT7A4402B/4402L can
be left open as shown in Figure 8 or connected as an output
pin.
When selecting the clock oscillator, following specifications
should be considered. They are
Refer to AC Electrical Characteristics.
PT0100(12/05)
Figure 8. Clock Oscillator Connection
- absolute frequency
- frequency change over temperature
- output rise and fall time
- duty cycle
PT7A4402B/4402L
output level
OSCo
No Connection
OSCi
20MHz OUT
+5V
GND
+5V
0.1µF
14
• Crystal Oscillator
If a crystal oscillator is selected as the master timing source, it
should be connected to the PT7A4402B/4402L as shown in
Figure 9.
The crystal specification is as follows:
Guard Time Adjustment Circuit
AT&T TR62411 recommends that excessive switching of the
timing reference should be minimized. Switching between refer-
ences should be performed only when the primary signal is
degraded.
The Holdover State is used to minimize reference source switch-
ing (from PRI to SEC). When the PRI signal is degraded, the
PT7A4402B/4402L enters Holdover State for a predetermined
maximum time (i.e., guard time). If the PRI signal returns to nor-
mal before the expiration of the guard time (level at GTi pin is
low), the PT7A4402B/4402L will return to Normal State with PRI
input reference. If the PRI signal is still degraded after expira-
tion of the guard time (level at GTi becomes high), the reference
switching (from PRI to SEC) will occur.
Figure 9. Crystal Oscillator Connection
- Frequency:
- Tolerance:
- Oscillation Mode:
- Resonance Mode:
- Load Capacitance:
- Maximum Series Resistance:
- Approximate Drive Level:
PT7A4402B/4402L
OSCo
OSCi
1MΩ
T1/E1 System Synchronizer
56pF
100Ω
20MHz
PT7A4402B/4402L
Fundamental
20MHz
as required
Parallel
32pF
35W
1mW
39pF
Data Sheet
3-50pF
Ver:1