pt7a6632 ETC-unknow, pt7a6632 Datasheet - Page 20

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pt7a6632

Manufacturer Part Number
pt7a6632
Description
Pt7a6632 32-channel Hdlc Controller
Manufacturer
ETC-unknow
Datasheet

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External Memory Organization and
Definition
General Structure
The external memory is divided by the CPU into two func-
tional blocks for channel activation and data processing, re-
ferred as Activation Memory and Data Processing Memory.
The Activation Memory contains Channel Activation Byte
PT019(05/02)
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Figure 20. External Memory Map - Top Level
p + n 1
x + n - 1
(Address)
j + 128
j + 255
p + 1
x + 1
to
to
to
0
1
2
p
x
j
~ ~
~ ~
~ ~
~ ~
128 Bytes of System Memory
for Channel Buffer Pointers
Channel Activation Byte
For Tx Channel #m
n-Byte Data Buffer
External Memory
n-Byte Data Buffer
For Rx Channel #k
(Contents)
20
PT7A6632 32-Channel HDLC Controller
and Channel Buffer Pointers, providing PT7A6632 such in-
formation as channel activation/deactivation, channel direc-
tion (transmit or receive) and channel starting addresses. CPU
allocates the Channel Starting Pointer for each receive and
transmit channel.
The Data Processing Memory contains data/command buffers
storing descriptors, user’s data received or to be transmitted,
channel operation mode and status. CPU allocates a set of
linked data/command buffers for each receive and transmit
channel.
Details are shown in Figures 20-22.
~ ~
~ ~
~ ~
~ ~
Activation
Memory
Data
Processing
Memory
Data Sheet
Ver:2

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