sp691a Exar Corporation, sp691a Datasheet - Page 8

• Manufacturer Part Number: sp691a
• Description: Low Power Microprocessor Supervisory With Battery Switch-over
• Manufacturer: Exar Corporation

Date: 4/18/05
Pin 1 — V
Pin 2 —V
Pin 3 — V
Pin 4 — GND — Ground reference for all
Pin 5 — BATT ON — Battery On Output. Goes
Pin 6 — LOWLINE — Low Line Output. This
nect to the external battery supply or super-
charging capacitor and charging circuit. If a
backup battery is not provided, connect this
pin to ground.
signals.
output pin goes LOW when V
the reset threshold voltage. This output pin
returns to its HIGH output as soon as V
rises above the reset threshold voltage.
connects to V
V
When V
below the reset threshold, V
V
to GND.
high when V
when V
base of a PNP through a current-limiting
resistor to BATT ON for V
requirements greater than 250mA.
LOWLINE
BATT ON
BATT
BATT
OSC
OSC
V
. Connect a 0.1µF capacitor from V
V
GND
OUT
BATT
CC
BATT
Vcc
and V
OUT
SEL
IN
SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2005 Sipex Corporation
— +5V Input Supply Voltage.
OUT
— Output Supply Voltage. V
CC
— Battery-Backup Input. Con-
2
3
6
8
1
4
5
7
CC
switches to V
falls below V
OUT
TOP VIEW
is above the reset threshold.
CC
DIP/SO
switches to V
Corporation
when V
PIN ASSIGNMENTS
15
12
16
14
13
10
11
9
CC
RESET
RESET
CE
WDO
CE
WDI
CC
PFO
PFI
BATT
is greater than
OUT
. Connect the
OUT
IN
CC
BATT
connects to
OUT
and V
falls below
. Goes low
PINOUT
current
CC
CC
OUT
OUT
is
8
Pin 7 — OSC
Pin 8 — OSC
Pin 9 — PFI — Power-Fail Input. This is the
Pin 10 — PFO — Power-Fail Output. This is
Pin 11 — WDI — Watchdog Input. This is a
When OSC
HIGH, a 10µA pull-up connects from V
to this input pin, the internal oscillator sets
the reset and watchdog timeout periods, and
this input pin selects between fast and slow
watchdog timeout periods. When OSC
driven LOW, the reset and watchdog timeout
periods may be set either by a capacitor from
this input pin to ground or by an external
clock at this pin (refer to Figure 21).
OSC
internal oscillator sets the reset delay and
watchdog timeout period. When OSC
driven LOW, the external oscillator input
pin, OSC
This input pin has a 10µA internal pull-up.
three-level input pin. If WDI remains either
HIGH or LOW for longer than the watchdog
timeout period, WDO goes LOW and RESET
is asserted for the reset timeout period. WDO
remains LOW until the next transition at this
input pin. Leaving this input pin unconnected
disables the watchdog function. This input
pin connects to an internal voltage divider
between V
mid-supply when left unconnected.
noninverting input to the power-fail
comparator. When PFI is less than 1.25V,
PFO goes low. Connect PFI to GND or
V
the output of the power-fail comparator.
PFO goes low when PFI is less than 1.25V.
This is an uncommitted comparator, and
has no effect on any other internal circuitry.
OUT
SEL
when not used.
is unconnected or driven HIGH, the
IN
OUT
SEL
IN
, is enabled (refer to Table 1).
SEL
— External Oscillator Input.
— Oscillator Select. When
and ground, which sets it to
is unconnected or driven
SEL
SEL
OUT
is
is