71m6545h-igtr/f Maxim Integrated Products, Inc., 71m6545h-igtr/f Datasheet - Page 26
71m6545h-igtr/f
Manufacturer Part Number
71m6545h-igtr/f
Description
Metrology Processors
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.71M6545H-IGTRF.pdf
(134 pages)
- Current page: 26 of 134
- Download datasheet (2Mb)
The function of each pulse generator is determined by the CE code and the MPU code must configure the
corresponding pulse outputs in agreement with the CE code. For example, standard CE code produces a
mains zero-crossing pulse on XPULSE and a SAG pulse on YPULSE.
Data Sheet 71M6545/H
2.3.4 Meter Equations
The 71M6545/H provides hardware assistance to the CE in order to support various meter equations.
This assistance is controlled through I/O RAM field EQU[2:0] (equation assist, I/O RAM 0x2106[7:5]). The
Compute Engine (CE) firmware for industrial configurations can implement the equations listed in
EQU[2:0] specifies the equation to be used based on the meter configuration and on the number of phases
used for metering.
2.3.5 Real-Time Monitor (RTM)
The CE contains a Real-Time Monitor (RTM), which can be programmed to monitor four selectable XRAM
locations at full sample rate. The data from the four monitored locations are serially output to the TMUXOUT
pin via the digital output multiplexer at the beginning of each CE code pass. The RTM can be enabled and
disabled with RTM_E (I/O RAM 0x2106[1]). The RTM output clock is available on the TMUX2OUT pin.
Each RTM word is clocked out in 35 cycles and contains a leading flag bit. See
format. RTM is low when not in use.
2.3.6 Pulse Generators
The 71M6545/H provides four pulse generators, VPULSE, WPULSE, XPULSE and YPULSE, as well as
hardware support for the VPULSE and WPULSE pulse generators. The XPULSE and YPULSE generators
are used by standard CE code to output CE status indicators, for example the status of the sag detection,
to DIO pins. All pulses can be configured to generate interrupts to the MPU.
The polarity of the pulses may be inverted with PLS_INV (I/O RAM 0x210C[0]). When this bit is set, the
pulses are active high, rather than the more usual active low. PLS_INV inverts all the pulse outputs.
26
EQU[2:0]*
RTM DATA0 (32 bits)
RTM DATA1 (32 bits)
RTM DATA2 (32 bits)
RTM DATA3 (32 bits)
Note:
* Only EQU[2:0] = 5 is supported by the currently available CE code versions for the 71M6545/H.
Contact your local Teridian representative for CE codes that support equations 2, 3 and 4.
MUX_STATE
MUX_SYNC
2
3
4
5
CKTEST
CK32
RTM
2-element, 3-W, 3φ Delta
2-element, 4-W, 3φ Delta
2-element, 4-W, 3φ Wye
3-element, 4-W, 3φ Wye
FLAG
Description
0
1
30
© 2008–2011 Teridian Semiconductor Corporation
Table 7: Inputs Selected in Multiplexer Cycles
31
FLAG
Element 0
VA(IA-IB)/2
VA(IA-IB)/2 VB(IC-IB)/2
Figure 8: RTM Timing
VA ∙ IA
VA ∙ IA
0
1
Wh and VARh formula
30
31
Element 1
VB ∙ IB
VB ∙ IB
VC ∙IC
FLAG
S
0
Element 2
1
VC ∙ IC
N/A
N/A
N/A
30
31
Figure 8
FLAG
Multiplexer Sequence
IA VA IB VB IC VC (ID)
IA VA IB VB IC VC
IA VA IB VB IC VC
Recommended
IA VA IB VB
for the RTM output
0
PDS_6545_009
1
30
31
Table
v1.0
7.
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