xr20v2172 Exar Corporation, xr20v2172 Datasheet - Page 10

• Manufacturer Part Number: xr20v2172
• Description: Two Channel I2c/spi Uart With 64-byte Fifo And Rs232 Transceiver
• Manufacturer: Exar Corporation

XR20V2172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
The V2172 includes an on-chip oscillator (XTAL1 and XTAL2) to produce a clock for both UART sections in the
device. The crystal oscillator provides a system clock to the Baud Rate Generators (BRG) section found in
each of the UART. XTAL1 is the input to the oscillator or external clock buffer input with XTAL2 pin being the
output. Please note that the input XTAL1 is not 5V tolerant and so the maximum at the pin should be VCC. For
programming details, see
page
The on-chip oscillator is designed to use an industry standard microprocessor crystal (parallel resonant,
fundamental frequency with 10-22 pF capacitance load, ESR of 20-120 ohms and 100 ppm frequency
tolerance) connected externally between the XTAL1 and XTAL2 pins (see
Rate Generator is capable of operating with a crystal oscillator frequency of up to 24 MHz. Although the V2172
can accept an external clock of up to 64MHz, the maximum data rate supported by the RS-232 drivers is
250Kbps. For further reading on the oscillator circuit please see the Application Note DAN108 on the EXAR
web site at
Each UART has its own Baud Rate Generator (BRG) with a prescaler for the transmitter and receiver. The
prescaler is controlled by a software bit in the MCR register. The MCR register bit-7 sets the prescaler to divide
the input crystal or external clock by 1 or 4. The output of the prescaler clocks to the BRG. The BRG further
divides this clock by a programmable divisor between 1 and (2
obtain a 16X, 8X or 4X sampling clock of the serial data rate. The sampling clock is used by the transmitter for
data bit shifting and receiver for data sampling. The BRG divisor (DLL, DLM and DLD registers) defaults to the
2.6
2.7
IRQ# Pin
10.”
Crystal Oscillator or External Clock Input
Programmable Baud Rate Generator with Fractional Divisor
http://www.exar.com.
HIGH = no data
LOW = 1 byte
(FIFO D
FCR B
““Section 2.7, Programmable Baud Rate Generator with Fractional Divisor” on
IT
ISABLED
F
T
-0 = 0
IGURE
ABLE
)
5: IRQ# P
6. T
22-47 pF
YPICAL OSCILLATOR CONNECTIONS
XTAL1
C1
HIGH = FIFO below trigger level
LOW = FIFO above trigger level
IN
500 ΚΩ − 1 ΜΩ
O
PERATION
R2
10
22-47 pF
XTAL2
C2
Y1
1.8432 MHz
(Optional)
0-120 Ω
24 MHz
F
16
R1
OR
to
- 0.0625) in increments of 0.0625 (1/16) to
R
ECEIVER
(FIFO E
FCR B
Figure
IT
NABLED
-0 = 1
6). The programmable Baud
)
REV. 1.0.0