xr20v2170 Exar Corporation, xr20v2170 Datasheet - Page 36
xr20v2170
Manufacturer Part Number
xr20v2170
Description
I2c/spi Uart With 64-byte Fifo And Rs232 Transceiver
Manufacturer
Exar Corporation
Datasheet
1.XR20V2170.pdf
(52 pages)
Available stocks
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Part Number:
xr20v2170IL40-F
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XR20V2170
I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is
selected, an interrupt will be generated when the receive FIFO is filled to the programmed trigger level and
RTS de-asserts HIGH at the programmed HALT level. RTS# will return LOW when FIFO data falls below the
programmed RESUME level. The RTS# output must be asserted (LOW) before the auto RTS can take effect.
RTS# pin will function as a general purpose output when hardware flow control is disabled.
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EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
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These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see
4.21.1
Logic 0 = Automatic RTS flow control is disabled (default).
Logic 1 = Enable Automatic RTS flow control.
Logic 0 = Automatic CTS flow control is disabled (default).
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts HIGH.
Data transmission resumes when CTS# returns LOW.
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
Table
8.
36
REV. 1.0.0