xr17l154iv Exar Corporation, xr17l154iv Datasheet - Page 26
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xr17l154iv
Manufacturer Part Number
xr17l154iv
Description
3.3v Pci Bus Quad Uart
Manufacturer
Exar Corporation
Datasheet
1.XR17L154IV.pdf
(56 pages)
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Each UART channel provides an internal loopback capability for system diagnostic. The internal loopback
mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 11
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held at logic 1 or mark condition while RTS# and DTR# are de-asserted, and
CTS#, DSR# CD# and RI# inputs are ignored.
The 4 sets of UART configuration registers are decoded using address lines A9 to A11 as shown below:
DISCONTINUED
4.4
4.5
Internal Loopback
UART CHANNEL CONFIGURATION REGISTERS AND ADDRESS DECODING.
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
F
IGURE
11. I
NTERNAL
L
OOP
A11
0
0
0
0
B
ACK
Transmit Shif t
Receive Shif t
A10
Register
Register
0
0
1
1
A9
26
RTS#
CTS#
DTR#
DSR#
0
1
0
1
CD#
RI#
MC R bit-4=1
UART C
OP1#
OP2#
S
VCC
VCC
ELECTION
VCC
0
1
2
3
HANNEL
3.3V PCI BUS QUAD UART
RX [3:0]
RTS# [3:0]
CTS# [3:0]
TX [3:0]
DSR# [3:0]
DTR# [3:0]
RI# [3:0]
CD# [3:0]
XR17L154
REV. 1.1.0
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