xr16m752im48 Exar Corporation, xr16m752im48 Datasheet - Page 50

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xr16m752im48

Manufacturer Part Number
xr16m752im48
Description
Xr68m752 -high Performance Duart With 64-byte Fifo
Manufacturer
Exar Corporation
Datasheet

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XR16M752/XR68M752
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
GENERAL DESCRIPTION ................................................................................................ 1
PIN DESCRIPTIONS ........................................................................................................ 3
1.0 PRODUCT DESCRIPTION....................................................................................................................... 7
2.0 FUNCTIONAL DESCRIPTIONS............................................................................................................... 8
3.0 UART INTERNAL REGISTERS ............................................................................................................. 22
4.0 INTERNAL REGISTER DESCRIPTIONS............................................................................................... 24
A
F
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE................................................................................................................................................. 8
2.2 DEVICE RESET ................................................................................................................................................... 9
2.3 CHANNEL A AND B SELECTION....................................................................................................................... 9
2.4 CHANNEL A AND B INTERNAL REGISTERS ................................................................................................... 9
2.5 DMA MODE........................................................................................................................................................ 10
2.6 INTA AND INTB OUTPUTS ............................................................................................................................... 10
2.7 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT .............................................................................. 11
2.8 PROGRAMMABLE BAUD RATE GENERATOR WITH FRACTIONAL DIVISOR............................................ 11
2.9 TRANSMITTER .................................................................................................................................................. 13
2.10 RECEIVER ....................................................................................................................................................... 15
2.11 AUTO RTS (HARDWARE) FLOW CONTROL ................................................................................................ 16
2.12 AUTO RTS HALT AND RESUME................................................................................................................... 16
2.13 AUTO RS485 HALF-DUPLEX CONTROL ..................................................................................................... 16
2.14 AUTO CTS FLOW CONTROL ........................................................................................................................ 17
2.15 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL...................................................................................... 18
2.16 SPECIAL CHARACTER DETECT .................................................................................................................. 18
2.17 INFRARED MODE ........................................................................................................................................... 18
2.18 SLEEP MODE WITH AUTO WAKE-UP.......................................................................................................... 19
2.19 INTERNAL LOOPBACK ................................................................................................................................. 20
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY .................................................................................. 24
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................... 24
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE................................................................................. 24
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY .................................................................................. 26
F
F
F
T
T
T
T
T
F
F
T
F
F
F
F
F
F
F
T
T
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
2.9.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ........................................................................................... 14
2.9.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................... 14
2.9.3 TRANSMITTER OPERATION IN FIFO MODE ............................................................................................................. 14
2.10.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 15
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................... 24
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION .................................................................. 25
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 26
1: C
2: C
3: TXRDY#
4: INTA
5: INTA
6: T
7: UART CHANNEL A AND B UART INTERNAL REGISTERS ....................................................................................... 22
8: INTERNAL REGISTERS DESCRIPTION. S
1. XR16M752 B
2. P
3. XR16M752/XR68M752 D
4. T
5. B
6. T
7. T
8. R
9. R
10. A
11. I
12. I
.................................................................................................................................................... 1
YPICAL DATA RATES WITH A
HANNEL
HANNEL
YPICAL OSCILLATOR CONNECTIONS
RANSMITTER
RANSMITTER
IN
AUD
ECEIVER
ECEIVER
NFRARED
NTERNAL
............................................................................................................................................... 1
UTO
O
AND
AND
UT
R
RTS
ATE
AND
A
A
A
INTB P
INTB P
O
O
SSIGNMENT
AND
AND
L
T
G
PERATION IN NON
PERATION IN
OOP
AND
RANSMIT
RXRDY# O
LOCK
ENERATOR
O
O
................................................................................................................................ 3
B S
B S
PERATION IN NON
PERATION IN
INS
IN
CTS F
B
ACK IN
ELECT IN
ELECT IN
O
D
O
IAGRAM
PERATION
..................................................................................................................................................... 2
D
PERATION FOR
ATA
LOW
............................................................................................................................................... 12
FIFO
UTPUTS IN
C
ATA
24 MH
HANNEL
E
16 M
68 M
FIFO
C
.......................................................................................................................................... 1
-FIFO M
NCODING AND
B
ONTROL
AND
TABLE OF CONTENTS
F
US
OR
-FIFO M
ODE
ODE
Z CRYSTAL OR EXTERNAL CLOCK AT
AND
............................................................................................................................... 11
I
A
FIFO
A
NTERCONNECTIONS
R
UTO
T
ODE
ECEIVER
AND
RANSMITTER
............................................................................................................................ 9
............................................................................................................................ 9
O
F
LOW
PERATION
ODE
RTS F
AND
.................................................................................................................... 15
B ................................................................................................................ 21
R
ECEIVE
HADED BITS ARE ENABLED WHEN
C
.............................................................................................................. 14
DMA M
ONTROL
............................................................................................................. 10
LOW
....................................................................................................... 17
...................................................................................................... 10
I
D
C
ODE
ATA
ONTROL
.................................................................................................. 8
M
ODE
D
........................................................................................... 10
ECODING
..................................................................................... 14
M
ODE
16X S
.......................................................................... 19
......................................................................... 16
AMPLING
EFR B
IT
................................................... 13
-4=1 ......................................... 23
REV. 1.0.2

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