xr16m681 Exar Corporation, xr16m681 Datasheet - Page 9
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xr16m681
Manufacturer Part Number
xr16m681
Description
1.62v To 3.63v Uart With 32-byte Fifo And Vlio Interface
Manufacturer
Exar Corporation
Datasheet
1.XR16M681.pdf
(51 pages)
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REV. 1.0.0
The RESET# input resets the internal registers and the serial interface outputs to their default state (see
Table
device. Following a power-on reset or an external reset, the M681 is software compatible with previous
generation of UARTs.
The M681 has a set of 16550 compatible registers for controlling, monitoring and data loading and unloading.
These registers function as data holding registers (THR/RHR), interrupt status and control registers (ISR/IER),
a FIFO control register (FCR), receive line status and control registers (LSR/LCR), modem status and control
registers (MSR/MCR), programmable data rate (clock) divisor registers (DLL/DLM/DLD), and a user accessible
scratchpad register (SPR).
Beyond the general 16C550 features and capabilities, the M681 offers enhanced feature registers (EFR, Xon1/
Xoff 1, Xon2/Xoff 2, DLD, FCTR, EMSR, FC and TRIG) that provide automatic RTS and CTS hardware flow
control, automatic Xon/Xoff software flow control, 9-bit (Multidrop) mode, auto RS-485 half duplex control,
different baud rate for TX and RX and fractional baud rate generator. All the register functions are discussed in
full detail later in
The interrupt outputs change according to the operating mode and enhanced features setup.
summarize the operating behavior for the transmitter and receiver. Also see
2.3
2.4
2.5
INT Pin
INT Pin
16). An active low pulse of longer than 40 ns duration will be required to activate the reset function in the
Device Reset
Internal Registers
INT Ouput
“Section 3.0, UART INTERNAL REGISTERS” on page
LOW = One byte in THR
HIGH = THR empty
HIGH = One byte in RHR
LOW = RHR empty
FCR B
FCR B
IT
IT
-0 = 0 (FIFO D
-0 = 0 (FIFO D
T
ABLE
T
ABLE
1: INT P
1.62V TO 3.63V UART WITH 32-BYTE FIFO AND VLIO INTERFACE
2: INT P
ISABLED
ISABLED
IN
IN
O
)
)
PERATION FOR
O
PERATION FOR
9
LOW = FIFO above trigger level
HIGH = FIFO below trigger level or FIFO empty
LOW = FIFO below trigger level
HIGH = FIFO above trigger level or RX Data Timeout
T
RANSMITTER
R
ECEIVER
FCR B
FCR B
23.
IT
IT
Figure 19
-0 = 1 (FIFO E
-0 = 1 (FIFO E
through 22.
NABLED
NABLED
XR16M681
Table 1 and 2
)
)