xr16m681 Exar Corporation, xr16m681 Datasheet - Page 22
xr16m681
Manufacturer Part Number
xr16m681
Description
1.62v To 3.63v Uart With 32-byte Fifo And Vlio Interface
Manufacturer
Exar Corporation
Datasheet
1.XR16M681.pdf
(51 pages)
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XR16M681
1.62V TO 3.63V UART WITH 32-BYTE FIFO AND VLIO INTERFACE
The M681 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 14
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held HIGH or mark condition while RTS# and DTR# are de-asserted, and CTS#,
DSR# CD# and RI# inputs are ignored. Caution: the RX input must be held HIGH during loopback test else
upon exiting the loopback test the UART may detect and report a false “break” signal.
F
2.18
IGURE
14. I
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
NTERNAL
L
OOPBACK
T ra n s m it S h ift R e g is te r
R e c e iv e S h ift R e g is te r
(R H R /F IF O )
(T H R /F IF O )
22
R T S #
C T S #
D T R #
D S R #
C D #
R I#
M C R b it-4 = 1
V C C
O P 2 #
O P 1 #
V C C
V C C
T X
R X
R T S #
C T S #
D T R #
D S R #
R I#
C D #
REV. 1.0.0