ak4364 AKM Semiconductor, Inc., ak4364 Datasheet - Page 21

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ak4364

Manufacturer Part Number
ak4364
Description
96khz 24bit ?? Dac With Pll And Dit
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
n Power-down
The DAC is placed in the power-down mode by bringing PDN pin “L” and the digital filter is also reset at the same time.
The internal register values are initialized by PDN “L”. This reset should always be done after power-up. Because some
click noise occurs at the edge of PDN, the analog output should be muted externally if the click noise influences system
application.
Notes:
MS0014-E-02
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs are floating (Hi -Z) at the power-down mode.
(3) Click noise occurs at the edge of PDN signal. This noise is output even if “0” data is input.
(4) The external clocks (MCKI, BICK and LRCK) can be stopped in the power-down mode (PDN = “L”).
(5) Please mute the analog output externally if the click noise (3) influences system application.
(6) DZF pin is “L” in the power-down mode (PDN = “L”).
Internal
D/A In
D/A Out
Clock In
MCKI, LRCK, BICK
PDN
DZF
External
MUTE
(Digital)
(Analog)
The timing example is shown in this figure.
State
(5)
Normal Operation
Figure 11. Power-down/up sequence example
GD
(1)
(3)
(6)
- 21 -
(4)
Mute ON
Power-down
“0” data
Don’t care
(2)
(3)
Normal Operation
GD
(1)
[AK4364]
2001/05

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