ak4364 AKM Semiconductor, Inc., ak4364 Datasheet - Page 18

• Manufacturer Part Number: ak4364
• Description: 96khz 24bit ?? Dac With Pll And Dit
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The sub-frame is defined in the figure below:
The block of data contains consecutive frames transmitted at a bit rate of 64 times the sample frequency, fs.
Figure 9 shows the relation between input data to SDTI pin and audio data on sub-frame.
MS0014-E-02
- Bits 0-3 of the sub-frame represent a preamble for synchronization. There are three preambles:
- Bits 4-27 of the sub-frame contain the 24 bit audio sample in 2’s complement format with bit 27 as the most
- Bit 28 is the validity flag. This is equal to V bit in the register.
- Bit 29 is a user data bit. This is always “0” in the AK4364.
- Bit 30 is a channel status bit. Frame 0 contains the first bit of the 192 bit word with the last bit in frame 191.
- Bit 31 is an even parity bit for bits 4-31 of the sub-frame.
significant bit (MSB). For 16 bit mode, Bits 4-11 are all 0.
The block preamble, B, is contained in the first sub-frame of Frame 0.
The channel 1 preamble, M, is contained in the first sub-frame of all other frames.
The channel 2 preamble, W, is contained in all of the second sub-frames.
Table 5 defines the symbol encoding for each of the preambles.
0
Figure 9. Relation between input data to SDTI pin and audio data on sub-frame
Sub-frame
Mode 0
Mode 1
Mode 2
Mode 3,4,5
Sync
Preamble
3 4
W
M
L
S
B
B
L
S
B
4
0
Table 5. Sub-frame preamble encoding
1 2 3 4 5 6 7 8
Preceding state = 0
Figure 8. Sub-frame format
11101000
11100010
11100100
Audio sample
0
- 18 -
Audio sample
1 2 3 4
0
1 2
0
Preceding state = 1
00010111
00011101
00011011
27 28 29 30 31
M
S
B
27
15
17
19
23
M
S
B
V
U
C
[AK4364]
P
2001/05