ak4380 AKM Semiconductor, Inc., ak4380 Datasheet

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ak4380

Manufacturer Part Number
ak4380
Description
100db 24bit 96khz 2ch Dac
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ak4380VT-E2
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ak4380VT-E2
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ak4380VT-E2
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ASAHI KASEI
The AK4380 offers the perfect mix for cost and performance based audio systems. Using AKM's multi bit
architecture for its modulator the AK4380 delivers a wide dynamic range while preserving linearity for
improved THD+N performance. The AK4380 integrates a combination of SCF and CTF filters, removing
the need for high cost external filters and increasing performance for systems with excessive clock jitter.
The 24 Bit word length and 96kHz sampling rate make this part ideal for a wide range of applications
including DVD and AC-3 systems. The AK4380 is offered in a space saving 16pin TSSOP package.
MS0018-E-01
SMUTE/CSN
DFS/CCLK
DIF0/CDTI
LRCK
BICK
SDTI
o Sampling Rates Ranging from 8kHz to 96kHz
o 128x Oversampling (Normal speed mode)
o 64x Oversampling (Double speed mode)
o 24Bit 8x FIR Digital Filter
o 2nd order Analog LPF
o On chip Buffer with Single End Output
o Digital de-emphasis for 32k, 44.1k and 48kHz sampling
o Soft mute
o I/F format: 24bit MSB justified, 24/20/16bit LSB justified, I
o Master clock: 256fs, 384fs, 512fs or 768fs (Normal speed mode)
o THD+N: -88dB
o Dynamic Range: 100dB
o High Tolerance to Clock Jitter
o Power supply: 4.5 to 5.5V
o Space Saving 16 Pin TSSOP (6.4mm x 5.0mm) Package
Interface
Interface
PDN
Audio
P/S
Data
µP
GENERAL DESCRIPTION
128fs, 192fs, 256fs or 384fs (Double speed mode)
De-emphasis
Interpolator
Interpolator
Control
FEATURES
8X
8X
- 1 -
100dB 24Bit 96kHz 2ch DAC
Modulator
Modulator
Divider
MCLK
Clock
LPF
VREF
LPF
AK4380
2
S
VDD
VSS
VCOM
DZF
AOUTR
AOUTL
[AK4380]
2000/8

Related parts for ak4380

ak4380 Summary of contents

Page 1

... ASAHI KASEI The AK4380 offers the perfect mix for cost and performance based audio systems. Using AKM's multi bit architecture for its modulator the AK4380 delivers a wide dynamic range while preserving linearity for improved THD+N performance. The AK4380 integrates a combination of SCF and CTF filters, removing the need for high cost external filters and increasing performance for systems with excessive clock jitter ...

Page 2

... Audio Serial Data Clock Pin Audio Serial Data Input Pin L/R Clock Pin Power-Down Mode Pin When at “L”, the AK4380 is in the power-down mode and is held in reset. The AK4380 should always be reset upon power-up. Soft Mute Pin in parallel mode “H”: Enable, “L”: Disable ...

Page 3

... AOUT (typ@0dB) = 3.4Vpp×VREF/5. *AKM assumes no responsibility for the usage beyond the conditions in this datasheet. MS0018-E-01 ABSOLUTE MAXIMUM RATINGS Symbol min VDD -0.3 IIN - VIND -0.3 Ta -40 Tstg -65 Symbol min VDD 4.5 VREF 3 [AK4380] max Units 6 VDD+0 150 C typ max Units 5.0 5 VDD V 2000/8 ...

Page 4

... PSR is applied to VDD with 1kHz, 100mV. VREF pin is held +5V. MS0018-E-01 ANALOG CHARACTERISTICS min (Note 44.1kHz fs = 96kHz fs = 44.1kHz 96kHz - fs = 44.1kHz 96kHz - 90 (Note 4) 3.15 10 (Note 5) (Note [AK4380] 10k ; unless otherwise L typ max Units 24 Bits -88 - 100 100 ...

Page 5

... Note: 9. P/S pin has internal pull-up device, normally 100k . MS0018-E-01 FILTER CHARACTERISTICS Symbol min 24. DIGITAL CHARACTERISTICS Symbol min VIH 2.2 VIL - VOH VDD-0.4 VOL - Iin - - 5 - [AK4380] typ max Units 20.0 kHz 22.05 - kHz kHz dB 0.02 dB 19 0.3 typ max Units - - ...

Page 6

... PDN Pulse Width Notes: 10. BICK rising edge must not occur at the same time as LRCK edge. 11. The AK4380 can be reset by PDN= “L” upon power up. If MCLK frequency or DFS changes, the AK4380 should be reset by PDN pin or RSTN bit. MS0018-E-01 SWITCHING CHARACTERISTICS Symbol ...

Page 7

... Timing Diagram MCLK tCLKH LRCK BICK tBCKH LRCK tBLR BICK SDTI MS0018-E-01 1/fCLK tCLKL dCLK=tCLKH x fCLK, tCLKL x fCLK 1/fs tBCK tBCKL Clock Timing tLRB tSDS tSDH Serial Interface Timing - 7 - [AK4380] VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL 2000/8 ...

Page 8

... CCLK CDTI C1 CSN CCLK CDTI D3 PDN MS0018-E-01 tCCKL tCCKH tCDS tCDH C0 R/W WRITE Command Input Timing WRITE Data Input Timing tPD Power-down Timing - 8 - [AK4380] VIH VIL VIH VIL VIH A4 VIL tCSW VIH VIL tCSH VIH VIL VIH VIL VIL 2000/8 ...

Page 9

... The AK4380 should be reset by PDN= “L” after threse clocks are provided. If the external clocks are not present, the AK4380 should be in the power-down mode (PDN= “L”). After exiting reset at power-up etc., the AK4380 is in the power-down mode until MCLK and LRCK are input. ...

Page 10

... Don’t care Figure 1. Mode 0 Timing - 10 - [AK4380] BICK Figure 32fs Figure 1 40fs Figure 2 Figure 3 48fs Figure 4 Default 48fs Figure 2 48fs Figure Figure 3 Figure ...

Page 11

... Don’t care 23 22 Figure 3. Mode 2 Timing Don’t care 23 22 Lch Data Figure 4. Mode 3 Timing - 11 - [AK4380 Rch Data Don’t care 1 23 ...

Page 12

... A digital de-emphasis filter is available for 32, 44.1 or 48kHz sampling rates (tc = 50/15µs) and is controlled by the DEM0 and DEM1 bits regardless of the status of DFS. MS0018-E-01 DFS DEM1 DEM0 Mode 44.1kHz OFF 48kHz 32kHz 44.1kHz OFF 48kHz 32kHz Table 6. De-emphasis filter control - 12 - [AK4380] Default 2000/8 ...

Page 13

... When the input data at both channels is continuously zeros for 8192 LRCK cycles, DZF pin goes to “H”. DZF pin immediately goes to “L” if the input data is not zero after going DZF “H”. MS0018-E-01 1024/fs (1) GD (2) (4) 8192/fs Figure 5. Soft mute and zero detection - 13 - [AK4380] (3) GD 2000/8 ...

Page 14

... The AK4380 should be reset once by bringing PDN = “L” upon power-up. The AK4380 is powered up and the internal timing starts clocking by LRCK “ ” after exiting reset and power down state by MCLK. The AK4380 is in the power-down mode until MCLK and LRCK are input. ...

Page 15

... ASAHI KASEI n Reset Function When RSTN = “0”, the AK4380’s digital section is powered down but the internal register values are not initialized. The analog outputs go to VCOM voltage and DZF pin goes to “H”. Figure 7 shows the example of reset by RSTN bit. ...

Page 16

... C0 R/W * The AK4380 does not support the read command and chip address. C1, C0 and R/W are fixed to “011” * When the AK4380 is in the power down mode (PDN = “L”) or the MCLK is not provided, writing into the control register is inhibited. MS0018-E-01 Parallel mode ...

Page 17

... RSTN: Internal timing reset control 0: Reset. All registers are not initialized. 1: Normal Operation When MCLK frequency or DFS changes, the AK4380 should be reset by PDN pin or RSTN bit. PW: Power down control 0: Power down. All registers are not initialized. 1: Normal Operation DIF2-0: Audio data interface formats (see Table 4) Initial: “ ...

Page 18

... ALL input pins except internal pull-up pin should not be left floating. - Decoupling capacitor, especially 0.1µF ceramic capacitor for high frequency should be placed as near to VDD and VREF pins as possible. - System ground including DSP/µP should be separated from AK4380’s VSS. Both grounds should be connected by one point at power supply or regulator on system board. MS0018-E-01 ...

Page 19

... An electrolytic capacitor 10 F parallel with a 0.1 F ceramic capacitor attached to VREF and VCOM pins eliminates the effects of high frequency noise. No load current may be drawn from VCOM pin. All signals, especially clocks, should be kept away from VREF and VCOM pins in order to avoid unwanted coupling into the AK4380. 3. Analog Outputs The analog outputs are also single-ended and centered around the VCOM voltage ...

Page 20

... ASAHI KASEI 16pin TSSOP (Unit: mm) 5 0.22 0.1 Seating Plane n Package & Lead frame material Package molding compound: Lead frame material: Lead frame surface treatment: MS0018-E-01 PACKAGE 0.65 Detail A 0.10 Epoxy Cu Solder plate - 20 - [AK4380] 1.10max 0.17 0.05 0.1 0 2000/8 ...

Page 21

... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0018-E-01 MARKING AKM 4380VT XXYYY Pin #1 indication 1) Date Code : XXYYY (5 digits) 2) XX: lot# YYY: Date Code Marketing Code : 4380VT 3) Asahi Kasei Logo 4) IMPORTANT NOTICE - 21 - [AK4380] 2000/8 ...

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