xrt91l31 Exar Corporation, xrt91l31 Datasheet - Page 7

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xrt91l31

Manufacturer Part Number
xrt91l31
Description
Sts-12/stm-4 Or Sts-3/stm-1 Sonet/sdh Transceiver
Manufacturer
Exar Corporation
Datasheet

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REV. 1.0.0
PIN DESCRIPTION
CDRREFSEL
LOOPTIME
CDRDIS
N
AME
LVCMOS
LVCMOS
LVCMOS
LVTTL,
LVTTL,
LVTTL,
L
EVEL
T
YPE
I
I
I
P
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
60
12
2
IN
Clock and Data Recover Unit Reference Frequency Select
Selects the Clock and Data Recovery Unit reference frequency
based on the table below.
"Low" = CDR uses CMU’s reference clock
"High" = CDR reference clock from CDRAUXREF-
CLK
N
Loop Timing Mode
When the loop timing mode is activated the external reference
clock to the input of the Retimer is replaced with the high-speed
recovered receive clock from the CDR.
"Low" = Disabled
"High" = Loop timing Activated
Clock and Data Recovery Unit Disable
Active "High." Disables internal Clock and Data Recovery unit.
Received serial data bypasses the integrated CDR block.
RXINP/N is then sampled on the rising edge of externally
recovered differential clock XRXCLKIP/N coming from the opti-
cal module.
"Low" = Internal CDR unit is Enabled
"High" = Internal CDR unit is Disabled and Bypassed
OTE
7
CDRREF-
:
SEL
0
1
1
CDRAUXREFCLK requires accuracy of 77.76 MHz
200
ppm.
STS12/
STS3
0
1
CDR uses CMU’s reference clock
D
(see CMUFREQSEL pin)
ESCRIPTION
CLK Frequency
CDRAUXREF-
77.76 MHz
77.76 MHz
STS-12/STM-4
STS-3/STM-1
XRT91L31
155.52 Mbps
622.08 Mbps
Data Rate

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