xrt91l31 Exar Corporation, xrt91l31 Datasheet - Page 4

• Manufacturer Part Number: xrt91l31
• Description: Sts-12/stm-4 Or Sts-3/stm-1 Sonet/sdh Transceiver
• Manufacturer: Exar Corporation

XRT91L31
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
GENERAL DESCRIPTION .................................................................................................1
T
PIN DESCRIPTIONS ..........................................................................................................6
1.0 FUNCTIONAL DESCRIPTION .............................................................................................................14
2.0 RECEIVE SECTION .............................................................................................................................15
3.0 TRANSMIT SECTION ..........................................................................................................................24
ABLE OF
APPLICATIONS ...........................................................................................................................................1
FEATURES
P
T
R
P
RANSMITTER
IN
OWER AND
ECEIVER
1.1 STS-12/STM-4 AND STS-3/STM-1 MODE OF OPERATION ......................................................................... 14
1.2 CLOCK INPUT REFERENCE FOR CLOCK MULTIPLIER (SYNTHESIZER) UNIT ...................................... 14
1.3 DATA LATENCY ............................................................................................................................................. 14
2.1 RECEIVE SERIAL INPUT ............................................................................................................................... 15
2.2 RECIEVE SERIAL DATA INPUT TIMING ...................................................................................................... 16
2.3 RECEIVE CLOCK AND DATA RECOVERY .................................................................................................. 17
2.4 EXTERNAL RECEIVE LOOP FILTER CAPACITORS ................................................................................... 19
2.5 LOSS OF SIGNAL .......................................................................................................................................... 19
2.6 SONET FRAME BOUNDARY DETECTION AND BYTE ALIGNMENT RECOVERY .................................... 20
2.7 RECEIVE SERIAL INPUT TO PARALLEL OUTPUT (SIPO) ......................................................................... 20
2.8 RECEIVE PARALLEL OUTPUT INTERFACE ............................................................................................... 21
2.9 DISABLE PARALLEL RECEIVE DATA OUTPUT UPON LOS ..................................................................... 21
2.10 RECEIVE PARALLEL DATA OUTPUT TIMING .......................................................................................... 22
3.1 TRANSMIT PARALLEL INPUT INTERFACE ................................................................................................. 24
3.2 TRANSMIT PARALLEL DATA INPUT TIMING .............................................................................................. 25
3.3 ALTERNATE TRANSMIT PARALLEL BUS CLOCK INPUT OPTION .......................................................... 26
3.4 ALTERNATE TRANSMIT PARALLEL DATA INPUT TIMING ....................................................................... 26
F
F
T
T
T
T
F
F
T
T
T
T
F
F
F
F
F
F
T
T
T
F
F
T
T
F
F
T
T
C
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
ABLE
IGURE
IGURE
ABLE
ABLE
ONFIGURATION
2.3.1 INTERNAL CLOCK AND DATA RECOVERY BYPASS ............................................................................................ 17
1: O
2: H
3: CMU R
4: D
5: R
6: R
7: C
8: CDR AUXREFCLK R
9: R
10: R
11: PECL
12: T
13: T
14: A
15: A
1. B
2. 64 QFP P
3. R
4. R
5. I
6. E
7. LOS D
8. S
9. R
10. R
11. T
12. T
13. A
14. A
C
......................................................................................................................................................2
S
ONTENTS
ECTION
G
ARDWARE
ATA INGRESS TO DATA EGRESS LATENCY
ECEIVE
ECEIVE
LOCK
NTERNAL
ECEIVE
RDERING
LOCK
XTERNAL
IMPLIFIED
ECEIVE
ECEIVE
ECEIVE
RANSMIT
RANSMIT
LTERNATE
LTERNATE
ECEIVE
S
ROUND
RANSMIT
RANSMIT
ECEIVE
LTERNATE
LTERNATE
ECTION
D
EFERENCE
AND
ECLARATION
D
H
H
ATA
P
......................................................................................................................................11
IAGRAM OF
S
H
P
P
ARALLEL
IGH
IGH
I
C
......................................................................................................................................3
IN
NFORMATION
P
C
ERIAL
ARALLEL
P
P
IGH
L
ARALLEL
B
TTL R
LOCK AND
P
P
..................................................................................................................................12
ARALLEL
OOP
ARALLEL
ARALLEL
T
T
R
ONTROL
O
LOCK
-
-S
T
T
ARALLEL
ARALLEL
..................................................................................................................................9
RANSMIT
RANSMIT
SPEED
ECOVERY UNIT REFERENCE CLOCK SETTINGS
-S
..........................................................................................................
UT OF THE
RANSMIT
RANSMIT
PEED
PEED
I
F
F
NPUT
ECEIVE
ILTERS
D
D
REQUENCY
C
O
D
ATA
XRT91L31 ...................................................................................................................................... 1
IAGRAM OF
....................................................................................................................................................... 6
S
EFERENCE
O
D
D
S
IRCUIT
UTPUT
ATA
D
S
I
I
ERIAL
ERIAL
P
P
UTPUT
NPUT
NPUT
ATA
ATA
I
................................................................................................................................................... 3
ATA
P
P
NTERFACE
ERIAL
ARALLEL
ARALLEL
O
XRT91L31 (T
.............................................................................................................................................. 19
ARALLEL
ARALLEL
O
O
UTPUT
I
I
UTPUTS
UTPUT
NPUT
NPUT
.......................................................................................................................................... 19
R
I
D
I
T
D
NTERFACE
NTERFACE
ECOVERY
T
D
O
IMING
ATA
TABLE OF CONTENTS
ATA
IMING
ATA
F
SIPO ........................................................................................................................... 20
PTIONS
REQUENCY
T
D
D
T
T
I
I
I
T
B
IMING
I
ATA
ATA
IMING
IMING
NPUT
NPUT
NPUT
NPUT
T
I
IMING
.............................................................................................................................. 25
LOCK
NPUT
IMING
............................................................................................................................ 22
I
I
OP
(D
B
B
NPUT
NPUT
B
....................................................................................................................... 14
I
T
(STS-12/STM-4 O
T
(STS-12/STM-4 O
(STS-3/STM-1 O
T
YPASS
LOCK
NTERFACE
..................................................................................................................... 15
LOCK
IFFERENTIAL OR
(STS-3/STM-1 O
IMING
T
IMING
IMING
V
S
IMING
IEW
R
PECIFICATION
T
T
EQUIREMENT
............................................................................................................. 21
............................................................................................................. 24
IMING
IMING
............................................................................................................ 18
............................................................................................................ 26
)............................................................................................................ 3
(STS-12/STM-4 O
(STS-3/STM-1 O
D
IV
IAGRAM
B
(STS-12/STM-4 O
(STS-3/STM-1 O
LOCK
S
............................................................................................ 17
............................................................................................ 23
PERATION
.......................................................................................... 16
F
(P
INGLE
PERATION
PERATION
PERATION
OR
ARALLEL
C
-E
LOCK AND
PERATION
PERATION
NDED
)........................................................................... 25
) ......................................................................... 22
) ......................................................................... 22
)......................................................................... 25
C
PERATION
PERATION
LOCK
) ................................................................... 14
) ............................................................... 16
D
) ............................................................. 16
ATA
I
NPUT
) ........................................................ 27
) ...................................................... 27
R
ECOVERY
O
PTION
) ...................................... 26
..................................... 17
REV. 1.0.0
IV