lf3330 LOGIC Devices Incorporated, lf3330 Datasheet - Page 10

• Manufacturer Part Number: lf3330
• Description: Vertical Digital Image Filter
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
into limit register 7. Data value
3B60H is loaded as the lower limit and
72A4H is loaded as the upper limit.
It takes 9S clock cycles to load S coef-
ficient sets into the device. Therefore,
it takes 2304 clock cycles to load all
256 coefficient sets. Assuming an 83
MHz clock rate, all 256 coefficient sets
can be updated in less than 27.7 µs,
which is well within vertical blanking
time. It takes 5S clock cycles to load
S round or limit registers. Therefore,
it takes 160 clock cycles to update all
round and limit registers. Assuming
an 83 MHz clock rate, all round/limit
registers can be updated in 1.92 µs.
The coefficient banks and
configuration/control registers are not
R = Reserved. Must be set to “0”.
* This bit represents the MSB of the Lower Limit.
** This bit represents the MSB of the Upper Limit.
1st Word - Address
2nd Word - Data
1st Word - Address
2nd Word - Data
3rd Word - Data
4th Word - Data
5th Word - Data
T
T
ABLE
ABLE
13. S
14. L
IMIT
ELECT
R
CF
CF
EGISTER
R
R
R
R
R
0
0
1
11
11
EGISTER
CF
CF
L
R
R
R
R
1
0
1
OADING
10
10
L
OADING
loaded with data until all data values
for the specified address are loaded
into the LF Interface
words, the coefficient banks are not
written to until all eight coefficients
have been loaded into the LF Inter-
face
to until all four data values are loaded.
After the last data value is loaded, the
interface will expect a new address
value on the next clock cycle. After
the next address value is loaded, data
loading will begin again as previously
discussed. As long as data is loaded
into the interface, LD must remain
LOW. After all desired coefficient
banks and configuration/control reg-
isters are loaded with data, the LF
Interface
CF
CF
R
R
R
R
1
0
1
F
9
9
ORMAT
TM
F
. A round register is not written
ORMAT
CF
CF
TM
R
R
R
R
0
0
0
8
8
must be disabled. This
CF
CF
0**
0*
0
0
0
0
1
10
7
7
TM
. In other
CF
CF
0
0
0
1
0
0
1
6
6
CF
CF
0
0
0
1
1
1
1
5
5
Vertical Digital Image Filter
CF
CF
is done by setting LD HIGH on the
clock cycle after the clock cycle which
latches the last data value. It is impor-
tant that the LF Interface
abled when not loading data into it.
0
0
0
0
1
0
1
4
4
Video Imaging Products
CF
CF
0
1
0
0
1
0
0
3
3
CF
CF
0
1
1
0
0
1
0
2
2
9/19/2005–LDS.3330-N
CF
CF
TM
1
1
1
0
1
0
1
1
1
remain dis-
LF3330
CF
CF
0
1
1
0
1
0
0
0
0