x40620 Intersil Corporation, x40620 Datasheet - Page 3

• Manufacturer Part Number: x40620
• Description: Dual Voltage Cpu Supervisor With 64k Serial Eeprom
• Manufacturer: Intersil Corporation

X40620
When the internal low voltage detect circuitry senses
that V2MON is low, the V2FAIL pin goes active. Typi-
cally this would be used by the processor as an inter-
rupt to stop the execution of the code or to do
housekeeping in preparation for an impending power
failure.
The RESET and V2FAIL signals remain active until
V
until V
V2FAIL remains active until immediately after V2MON
returns and exceeds it’s minimum voltage.
Watchdog Timer
The Watchdog Timer circuit monitors the microproces-
sor activity by monitoring the Start bit. The micropro-
cessor must send a start bit periodically to prevent a
RESET signal. The start bit must occur prior to the
expiration of the watchdog time-out period. The watch-
dog timer period is set at 150msec.
SERIAL MEMORY OPERATION
There are two primary modes of operation for the
X40620; READ and WRITE of the memory arrays.
CC
Recommended Connection
Volt
Reg
voltage drops below 1V. RESET remains active
CC
returns and exceeds V
Pin 1
SDA
WP
V
RESET
SS
OTP Mode
Enabled
V2MON
V2FAIL
V
SCL
CC
TRIP
for 200ms.
V
SDA
INTR
RESET
SCL
CC
µC
The basic method of communication to the memory
areas of the device is established by generating a start
condition, then transmitting a command, followed by
the address. The user must perform ACK Polling to
determine the validity of the address, before starting a
data transfer (see Acknowledge Polling.)
Data is transferred in 8-bit segments, with each trans-
fer being followed by an ACK, generated by the receiv-
ing device.
If the X40620 is in a nonvolatile write cycle a “no ACK”
(SDA=HIGH) response will be issued in response to
loading of the command byte. If a stop is issued prior
to the start of a nonvolatile write cycle the write opera-
tion will be terminated and the part will reset and enter
into a standby mode.
The basic sequence is illustrated in Figure 1.
After each transaction is completed, the X40620 will
reset and enter into a standby mode.
Figure 1. X40620 Device Operation
TWC or Data ACK Polling
Characteristics subject to change without notice.
Load Command Byte
Load 2 Byte Address
Read/Write
Data Bytes
3 of 17