x40620 Intersil Corporation, x40620 Datasheet

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x40620

Manufacturer Part Number
x40620
Description
Dual Voltage Cpu Supervisor With 64k Serial Eeprom
Manufacturer
Intersil Corporation
Datasheet
BLOCK DIAGRAM
64K
FEATURES
• Dual Voltage Detection and Reset Assertion
• Watchdog Timer (150ms)
• Power On Reset (150ms)
• Low Power CMOS
• 64kbit 2-Wire Serial EEPROM
• 2.5 to 3.7V Power Supply Operation
• 8-Lead TSSOP package
DESCRIPTION
The X40620 combines several functions into one
device. The first is a dual voltage monitoring, power-on
reset control, watchdog timer and 64Kbit serial
© Xicor, Inc. 2000 Patents Pending
9900-3003.5 4/24/00 EP
SDA
SCL
—Three standard reset threshold settings. (3.1V/
—Adjust low voltage reset threshold voltages
—RESET signal valid down to V
—10µA typical standby current, watchdog on
—400µA typical standby current, watchdog off
—1MHz serial interface speed
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
WP
2.6V, 3.1V/1.7V, 2.9V/2.3V)
using special programming sequence
Write Control
Command
Control
Decode
Logic
and
Logic
Dual Voltage CPU Supervisor with 64K Serial EEPROM
(V
CC
) Control Signal
CC
=1V
Timing and Control
EEPROM Array
HV Generation
Data Register
(64Kbits)
Y Decoder
X40620
EEPROM memory in one package. This combination
lowers system cost, reduces board space require-
ments, and increases reliability.
Applying voltage to V
circuit which holds RESET active for a period of time.
This allows the power supply and system oscillator to
stabilize before the processor can execute code.
Low V
from low voltage conditions, resetting the system when
V
active until V
stabilizes.
A second voltage monitor circuit (V2MON) tracks the
unregulated supply to provide a power fail warning or
monitors different power supply voltage. When the
second monitored voltage drops below a preset
V2
proper operating level and above the V2
Five common low voltage combinations are available,
however, Xicor’s unique circuits allows the threshold
for either voltage monitor to be reprogrammed to meet
special needs or to fine-tune the threshold for applica-
tions requiring higher precision.
CC
TRIP
falls below the set minimum Vtrip point. RESET is
CC
voltage. V2FAIL is active until V2 returns to
detection circuitry protects the user’s system
Power on and
Low Voltage
Generation
Timer Reset
Watchdog
Watchdog
CC
Timebase
Reset &
Reset
returns to proper operating level and
Characteristics subject to change without notice.
CC
activates the power on reset
+
-
+
-
V
TRIP
V
2TRIP
TRIP
voltage.
RESET
V2FAIL
V2MON
V
CC
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x40620 Summary of contents

Page 1

... Power Supply Operation • 8-Lead TSSOP package DESCRIPTION The X40620 combines several functions into one device. The first is a dual voltage monitoring, power-on reset control, watchdog timer and 64Kbit serial BLOCK DIAGRAM Write Control ...

Page 2

... The low V to 3.7V operating range. LOW VOLTAGE V2 MONITORING The X40620 also monitors a second voltage level and asserts V2FAIL if the voltage falls below a preset mini- rises CC mum V2 TRIP ...

Page 3

... ACK, generated by the receiv- for 200ms. ing device. TRIP If the X40620 nonvolatile write cycle a “no ACK” (SDA=HIGH) response will be issued in response to loading of the command byte stop is issued prior µC to the start of a nonvolatile write cycle the write opera- ...

Page 4

... X40620 Figure 2. Set V Level Sequence (V TRIP TRIP RESET SCL SDA D8h Figure 3. Set V2 Level Sequence (V TRIP V2 TRIP V2MON RESET SCL SDA D8h Figure 4. Reset V Level Sequence (V TRIP TRIP RESET ...

Page 5

... However, in applications where the standard thresholds are not exactly right higher precision is needed in the threshold value, the X40620 trip points may be adjusted. The procedure is described below, and uses the application of a high voltage control signal. ...

Page 6

... X40620 New V or V2MON Applied = CC Old V V2MON Applied + Error CC V /V2 Programming TRIP TRIP Execute Reset V /V2 TRIP TRIP Sequence Set Applied = CC CC Desired V OR TRIP Set V2MON = V2MON Applied = Desired V2 V >=V2Trip TRIP, CC Execute Set V V2 TRIP, TRIP Sequence Recycle V ...

Page 7

... Therefore, the X40620 will be considered a slave in all applications. After each byte written to or read from the X40620, the address pointer is incremented by 1. This allows the user to read from the entire device after sending only a single address ...

Page 8

... This involves issuing the start con- dition followed by the new command code of 8 bits (1st byte of the protocol.) If the X40620 is still busy with the nonvolatile write operation, it will issue a “no-ACK” in response. If the nonvolatile write operation has com- pleted, an “ ...

Page 9

... X40620 Figure 10. Acknowledge Polling SCL 8th CLK SDA MEMORY READ OPERATIONS Memory read operations are initiated in the same manner as write operations but with a different com- mand code. Random Read The master issues the start condition, then a Read instruction, then issues the word address. Once the fi ...

Page 10

... 3V) CC Test Max. ) 2MON Temp Min. 0°C –20°C Device Supply Voltage Limits X40620 2.5V to 3.7V Test Conditions f = 1MHz, SCL RESET = V2FAIL = V w/ pull up resistor 2MON 1MHz, SCL RESET = V2FAIL = V w/ pull up resistor CC RST = 0. ...

Page 11

... X40620 EQUIVALENT A.C. LOAD CIRCUIT 3V 1.3KΩ Output AC CHARACTERISTICS AC Specifications (Over the recommended operating conditions) Symbol f SCL Clock Frequency SCL t Pulse width of spikes which must be suppressed by the input filter IN t SCL LOW to SDA Data Out Valid AA t Time the bus must be free before a new transmit can start ...

Page 12

... X40620 TIMING DIAGRAMS Bus Timing SCL t SU:STA t HD:STA SDA IN SDA OUT Write Cycle Timing SCL SDA 8th Bit of Last Byte GUIDELINES FOR CALCULATING TYPICAL VALUES OF BUS PULL UP RESISTORS PMAX 4 2 RMIN Bus capacitance HIGH ...

Page 13

... X40620 POWER-UP AND POWER-DOWN TIMING RESET Output Timing V VTRIP Volts t RV RESET V2FAIL Output Timing V 2TRIP V2MON 0 Volts V2FAIL Symbol V RESET Trip Point Voltage TRIP V V2FAIL Trip Point Voltage 2TRIP V V Hysteresis (HIGH to LOW vs. LOW to HIGH V TH TRIP V V Hysteresis (HIGH to LOW vs. LOW to HIGH V ...

Page 14

... X40620 Start Bit vs. RESET Timing SCL t SU:STA SDA RESET RESET Output Timing Symbol t Watchdog Timeout Period WDO t SDA LOW duration (Reset the Watchdog) WDR t Reset Timeout RST t SU:STO t WDR t t WDO RST Parameter t t WDO RST Min. Typ. Max. 75 150 225 ...

Page 15

... X40620 PACKAGING INFORMATION 0° – 8° See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) 8-Lead Plastic, TSSOP, Package Type V .025 (.65) BSC .169 (4.3) .177 (4.5) .114 (2.9) .122 (3.1) .047 (1.20) .0075 (.19) .002 (.05) .0118 (.30) .006 (.15) .010 (.25) Gage Plane Seating Plane .019 (.50) .029 (.75) Detail A (20X) ...

Page 16

... V Package Operating Temperature Range 2TRIP 2.6 8L TSSOP 1.7 8L TSSOP 2.3 8L TSSOP Part Number 0°C–70°C X40620V8-3.1 -20°C–85°C X40620V8E-3.1 0°C–70°C X40620V8-3.1A -20°C–85°C X40620V8E- 3.1A 0°C–70°C X40620V8-2.9 -20°C–85°C X40620V8E-2.9 Characteristics subject to change without notice ...

Page 17

... X40620 Part Mark Convention 8-Lead TSSOP EYWW XXXX XX V TRIP 4062 AR = 3.1 4062 AS = 3.1 4062 AT = 3.1 4062 AU = 3.1 4062 AV = 2.9 4062 AW = 2.9 LIMITED WARRANTY Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty, express, statutory, implied description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Xicor, Inc. makes no warranty of merchantability or fi ...

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