ata5749-6dq ATMEL Corporation, ata5749-6dq Datasheet - Page 16

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ata5749-6dq

Manufacturer Part Number
ata5749-6dq
Description
Fractional-n Pll Transmitter Ic
Manufacturer
ATMEL Corporation
Datasheet
Figure 6-5.
16
1
2
3
)"register partly programmed": negative SCK
edge of 32-bit register programming MSB-1
(S433_N315)
) "register programmed'" negative SCK
edge of 32-bit register programming LSB
(CLK_ON)
) "PLL locked" 1280 XTO cycles (T
register programmed and XTO_RDY = 'High'
To transition from one state to another, only the
conditions next to the transition arrows must be
fulfilled. No additional settings are required.
ATA5749 [Preliminary]
TX_Mode_2
State Diagram of Operating Modes
SDIN_TXDIN = 'High'
(ASK_NFSK = 'High' and
ASK_NFSK = 'High' and
SDIN_TXDIN = 'High')
ASK_NFSK = 'Low' or
SDIN_TXDIN = 'Low'
EN = 'Low'
SDIN_TXDIN = 'Low'
PLL locked
EN = 'Low'
PLL
3
) after
TX_Mode_1
SDIN_TXDIN = 'High'
SDIN_TXDIN = 'Low'
EN = 'Low'
EN = 'Low'
register programmed
XTO_RDY = 'High'
CLK_Only = 'Low'
register programmed
CLK_Only = 'Low'
register parity programmed
register parity programmed
CLK_Only = 'Low'
CLK_Only = 'Low'
SDIN_TXDIN = 'Low'
2
EN = 'High'
2
Configuration_Mode_2
Configuration_Mode_1
Reset_Register_Mode
Start-Up_Mode_1
Start-Up_Mode_2
OFF_Mode
1
1
SDIN_TXDIN = 'Low'
EN = 'High'
SDIN_TXDIN = 'Low'
EN = 'Low'
register programmed
CLK_Only = 'High'
register programmed
CLK_Only = 'High'
XTO_RDY = 'High'
2
2
SDIN_TXDIN = 'High'
Clock_only_Mode
SDIN_TXDIN = 'Low'
EN = 'Low'
EN = 'Low'
9128D–RKE–01/09

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