m37753ffchp Mitsumi Electronics, Corp., m37753ffchp Datasheet - Page 32

• Manufacturer Part Number: m37753ffchp
• Description: Single Chip 16 Bit Cmos Microcomputer Flash Memory Version
• Manufacturer: Mitsumi Electronics, Corp.

CPU reprogramming mode operation proce-
dure
The operation procedure in CPU reprogramming mode is described
below.
Note: The following are necessary other than this:
Fig. 22 Flash command register bit configuration
32
< Beginning procedure >
Apply 0 V to the CNVss/V
Set the processor mode register 0 (see Figure 23).
After CPU reprogramming mode control program is transferred to
Set “1" (8-bit length) to data length select flag m.
Set “1" to the CPU reprogramming mode select bit.
Apply V
The operation of the flash memory is executed by software-com-
mand-writing to the flash command register .
whether the CPU reprogramming mode is valid.
Read the CPU reprogramming mode monitor flag to confirm
internal RAM, jump to this control program on RAM. (The follow-
ing operations are controlled by this control program).
Note: The flash command register is write-only register.
7
•Control for data which is input from the external (serial I/O
•Initial setting for ports etc.
•Writing to the watchdog timer
etc.) and to be programmed to the flash memory
6
PP
5
H to the CNV
4
<Software command name>
• Read command
• Program command
• Program verify command
• Erase command
• Erase verify command
• Auto erase command
• Reset command
3
2
1
SS
PP
/V
0
PP
pin for reset release.
Writing of software command
Flash command register
pin.
<Command code>
“00
“40
“C0
“20
“A0
“30
“FF
16
16
16
16
16
16
16
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
”
”
” + “20
” + “30
”
”
” + “FF
16
16
16
”
”
”
Address
65
16
Read command
When “00
M37753FFCFP and the M37753FFCHP enter the read mode. The
contents of the corresponding address can be read by reading the
flash memory (For instance, with the LDA instruction etc.) under this
condition.
The read mode is maintained until another command code is written
to the flash command register. Accordingly, after setting the read
mode once, the contents of the flash memory can continuously be
read.
is set.
Fig. 23 Processor mode register 0 bit configuration in CPU rewrit-
< Release procedure >
Each software command is explained as follows.
After reset and after the reset command is executed, the read mode
Apply 0V to the CNV
Set the CPU reprogramming mode select bit to “0.”
Note: For the description of processor mode register 0, refer to Figure 14
7
6
0
on the M37754M8C-XXXGP data sheet.
ing mode
5
16
" is written to the flash command register,
4
3
2
0
MITSUBISHI MICROCOMPUTERS
1
0
SS
/V
0
PP
Processor mode bits
Internal memory access bus cycle select bit
Software reset bit
Interrupt priority detection time select bits
Test mode bit
Clock
Processor mode register 0
pin.
0 0 : Single-chip mode
0 1 : Memory expansion mode
1
Fix this bit to “0.”
Fix this bit to “0.”
: Do not select.
1
M37753FFCHP
M37753FFCFP
output select bit
Address
5E
16
the