z86d73 ZiLOG Semiconductor, z86d73 Datasheet - Page 66
z86d73
Manufacturer Part Number
z86d73
Description
40/44/48-pin Low-voltage
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z86D73.pdf
(92 pages)
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PS019402-1103
SCLK/TCLK Divide-by-16 Select (D0)
D0 of the SMR controls a divide-by-16 prescaler of SCLK/TCLK (Figure 35). The
purpose of this control is to selectively reduce device power consumption during
normal processor execution (SCLK control) and/or HALT Mode (where TCLK
sources interrupt logic). After Stop-Mode Recovery, this bit is set to a 0.
Figure 35. SCLK Circuit
Stop-Mode Recovery Source (D2, D3, and D4)
These three bits of the SMR specify the wake-up source of the STOP recovery
(Figure 36 and Table 17).
÷
OSC
÷
16
2
SMR, D0
P
R
E
SCLK
TCLK
L
I
M
I
N
A
40/44/48-Pin Low-Voltage IR OTP
R
Y
Z86D73
60
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