z86d73 ZiLOG Semiconductor, z86d73 Datasheet - Page 35
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z86d73
Manufacturer Part Number
z86d73
Description
40/44/48-pin Low-voltage
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z86D73.pdf
(92 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PS019402-1103
Figure 16. Expanded Register File Architecture
*
*
Working Register
U = Unknown
* Is not reset with a Stop-Mode Recovery
** All addresses are in hexadecimal
↑
except Bit 0
(0) 03 P3
(0) 02 P2
(0) 01 P1
(0) 00 P0
Group Pointer
Expanded Reg. Bank/Group (0)
Register* *
Is not reset with a Stop-Mode Recovery,
Z8 Register File (Bank 0) * *
0F
00
7F
FF
F0
7
Register Pointer
6
5
4
P
U
U
U
0
3
U
U
U
0
2
R
U
U
U
0
1
Expanded Register
Bank Pointer
U
U
U
0
E
Reset
0
U
U
U
U
L
U
U
U
U
Reserved
U
U
U
U
I
Reserved
U
U
U
U
Z8
M
®
Standard Control Registers
I
N
A
40/44/48-Pin Low-Voltage IR OTP
↑
*
*
*
R
Expanded Reg. Bank/Group (F)
Register* *
Expanded Reg. Bank/Group (D)
Register* *
(D) 0C
(D) 0B
(D) 0A
(D) 09
(D) 08
(D) 07
(D) 06
(D) 05
(D) 04
(D) 03
(D) 02
(D) 01
(D) 00
FF
FE
FD
FC
FB
FA
F9
F8
F7
F6
F5
F4
F3
F2
F1
F0
(F) 0F WDTMR
(F) 0E Reserved
(F) 0D SMR2
(F) 0C Reserved
(F) 0B SMR
(F) 0A Reserved
(F) 09 Reserved
(F) 08 Reserved
(F) 07 Reserved
(F) 06 Reserved
(F) 05 Reserved
(F) 04 Reserved
(F) 03 Reserved
(F) 02 Reserved
(F) 01 Reserved
(F) 00 PCON
Register* *
Y
SPL
IPR
P01M
P3M
P2M
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SPH
FLAGS
IMR
RP
IRQ
HI16
LO16
TC16H
TC16L
TC8H
TC8L
Reserved
CTR2
CTR1
CTR0
LVD
HI8
LO8
D7 D6 D5 D4 D3 D2 D1 D0
U
U
0
U
0
0
U
0
0
1
U
U
U
U
0
0
0
U
0
1
0
U
U
U
U
U
U
U
0
0
0
U
Reset Condition
U
U
0
U
U
0
1
0
1
U
U
U
U
0
0
0
1
U
U
0
0
U
U
U
U
U
U
U
U
U
0
U
Reset Condition
U
U
0
U
U
0
U
0
0
1
U
U
U
U
0
U
0
U
1
1
0
U
U
U
U
U
U
U
U
U
U
U
Reset Condition
U
U
0
U
U
0
0
0
1
U
U
U
U
0
0
0
1
U
0
0
0
U
U
U
U
U
U
U
U
U
U
U
U
U
0
U
U
0
U
1
0
1
U
U
U
U
0
0
1
0
1
0
0
U
U
U
U
U
U
U
U
U
U
U
Z86D73
U
U
0
U
U
0
U
1
0
1
U
U
U
U
0
0
1
0
0
1
0
U
U
U
U
U
U
U
U
U
U
U
U
U
0
U
U
0
U
0
0
1
U
U
U
U
0
0
0
U
U
1
0
U
U
U
U
U
U
U
U
U
U
U
U
U
0
U
U
0
1
1
1
U
U
U
U
0
1
0
0
U
0
U
0
U
U
U
U
U
U
U
U
0
U
0
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