w77e58 Winbond Electronics Corp America, w77e58 Datasheet - Page 8
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w77e58
Manufacturer Part Number
w77e58
Description
8 Bit Microcontroller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W77E58.pdf
(85 pages)
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Preliminary W77E58
Timers:
The W77E58 has three 16-bit timers that are functionally similar to the timers of the 8052 family.
When used as timers, they can be set to run at either 4 clocks or 12 clocks per count, thus providing
the user with the option of operating in a mode that emulates the timing of the original 8052. The
W77E58 has an additional feature, the watchdog timer. This timer is used as a System Monitor or as
a very long time period timer.
Interrupts:
The Interrupt structure in the W77E58 is slightly different from that of the standard 8052. Due to the
presence of additional features and peripherals, the number of interrupt sources and vectors has been
increased. The W77E58 provides 12 interrupt resources with two priority level, including six external
interrupt sources, timer interrupts, serial I/O interrupts.
Data Pointers:
The original 8052 had only one 16-bit Data Pointer (DPL, DPH). In the W77E58, there is an additional
16-bit Data Pointer (DPL1, DPH1). This new Data Pointer uses two SFR locations which were unused
in the original 8052. In addition there is an added instruction, DEC DPTR (op-code A5H), which helps
in improving programming flexibility for the user.
Power Management:
Like the standard 80C52, the W77E58 also has IDLE and POWER DOWN modes of operation. The
W77E58 provides a new Economy mode which allow user to switch the internal clock rate divided by
either 4, 64 or 1024. In the IDLE mode, the clock to the CPU core is stopped while the timers, serial
ports and interrupts clock continue to operate. In the POWER DOWN mode, all the clock are stopped
and the chip operation is completely stopped. This is the lowest power consumption state.
On-chip Data SRAM:
The W77E58 has 1K Bytes of data space SRAM which is read/write accessible and is memory
mapped. This on-chip MOVX SRAM is reached by the MOVX instruction. It is not used for executable
program memory. There is no conflict or overlap among the 256 bytes Scratchpad RAM and the 1K
Bytes MOVX SRAM as they use different addressing modes and separate instructions. The on-chip
MOVX SRAM is enabled by setting the DME0 bit in the PMR register. After a reset, the DME0 bit is
cleared such that the on-chip MOVX SRAM is disabled, and all data memory spaces 0000H FFFFH
access to the external memory.
MEMORY ORGANIZATION
The W77E58 separates the memory into two separate sections, the Program Memory and the Data
Memory. The Program Memory is used to store the instruction op-codes, while the Data Memory is
used to store data or for memory mapped devices.
Program Memory:
The Program Memory on the W77E58 can be up to 64 Kbytes long. There is also on-chip ROM which
can be used similarly to that of the 8052, except that the ROM size is 32 Kbytes. All instructions are
fetched for execution from this memory area. The MOVC instruction can also access this memory
region. Exceeding the maximum address of on-chip ROM will access the external memory.
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