mb91307r Fujitsu Microelectronics, Inc., mb91307r Datasheet - Page 65

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mb91307r

Manufacturer Part Number
mb91307r
Description
32-bit Microcontroller Cmos Fr60 Mb91307 Series
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
9. DMAC (DMA Controller)
•Hardware Configuration
•Principal Functions
(1) Overview
This module is used to accomplish DMA (Direct Memory Access) transfer on FR family devices.
DMA transfer controlled by this module increases system performance by enabling high speed transfer of many
types of data without going through the CPU.
This module is principally configured from the following units:
• Five independent DMA channels
• 5 channels independent access control circuit
• 32-bit address registers (reload enabled: 2 per channel)
• 16-bit transfer count registers (reload enabled: 2 per channel)
• 4-bit block count registers (1 per channel)
• External transfer request input pins: DREQ0,DREQ1,DREQ2 (ch0, ch1, ch2 only)
• External transfer request acknowledge output pins: DACK0,DACK1,DACK2 (ch0, ch1, ch2 only)
• DMA output completed pins: DEOP0,DEOP1,DEOP2 (ch0, ch1, ch2 only)
• Fly-by transfer (memory to I/O, memory to memory) (ch0, ch1, ch2 only)
• Two-cycle transfer
Data transfer using the DMAC module primarily involves the following functions:
• Supports independent data transfer on multiple channels (5 channels)
(1) Order of priority (ch0 > ch1 > ch2 > ch3 > ch4)
(2) The order can be reversed between ch0 and ch1.
(3) DMAC startup sources
(4) Transfer modes
• Input from an external-only pin (edge detection/level detection, ch0, ch1, ch2 only)
• Request from a built-in peripheral (shared interrupt request, including external interrupts)
• Software request (register write)
• Demand transfer / burst transfer / step transfer / block transfer
• Addressing mode 32-bit full address designation (increment/decrement/fixed)
• Data type, byte / half-word / word length
• Single-shot / reload selection available
(address increment can be specified up to -255 to +255)
MB91307 Series
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