mb91307r Fujitsu Microelectronics, Inc., mb91307r Datasheet - Page 16

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mb91307r

Manufacturer Part Number
mb91307r
Description
32-bit Microcontroller Cmos Fr60 Mb91307 Series
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
16
MB91307 Series
• Clock control block
• Bit search module
• Prefetch
• Setting of external bus
• MCLK and SYSCLK
• I
• Shared port function switching
• Pull-up control
• I/O port access
• Remarks for the external clock operation
2
C input/output pin
For L-level input to the INIT pin, allow for the regulator settling time or oscillation settling time.
The 0-detection, 1-detection, and transition-detection data registers (BSD0, BSD1, and BSDC) are only word-
accessible.
When accessing a prefetch-enabled little endian area, use word access only (access in 32 bits).
Byte or halfword access results in wrong data read.
The MB91307 series is guaranteed at an external bus frequency of 33 MHz. As the external bus is capable of
supporting 66 MHz for future enhancements, the initial value is the same rate as the base clock (determined by
the PLL setting) . The external bus is set to 66 MHz if you set the base clock to 66 MHz with the external-bus
base clock division setting register (DIVR1) containing the initial value. To change the base clock frequency, set
the external bus frequency not exceeding 33 MHz and set the new base clock frequency.
MCLK causes a stop in SLEEP/STOP mode while SYSCLK causes a stop only in STOP mode. Use either
depending on each application.
The SDA and SCL pins of the MB91307 series are pseudo open-drain pins with the P-ch transistor turned off
to prevent the “H” level from being output. As the circuit configuration has a diode added to the V
the communication voltage must be adjusted to the 3.3-V power supply of this model (pulled up to a voltage of
3.3 V) .
To switch a pin that also serves as a port, use the port function register (PFR). Note, however, that bus pins are
switched depending on external bus settings.
Connecting a pull-up resistor to the pin serving as an external bus pin cannot a guarantee the AC standard.
Even the port for which a pull-up resistor has been set is invalid in stop mode with HIZ = 1 or in hardware standby
mode.
Byte access only for access to port
When selecting the external clock, active X0 pin generally. Also simultaneously the opposite phase clock to X0
must be supplied to X1 pin. When using the clock along with STOP (oscillation stopped) mode, the X1 pin stops
when “H” is input in STOP mode. To prevent one output from competing against another, in this case, the stop
mode must not be used.
CC
side, therefore,

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