mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 671
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mc9s12xd256
Manufacturer Part Number
mc9s12xd256
Description
Hcs12x Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12XD256.pdf
(1350 pages)
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18.4
The MMC block performs several basic functions of the S12X sub-system operation: MCU operation
modes, priority control, address mapping, select signal generation and access limitations for the system.
Each aspect is described in the following subsections.
18.4.1
Freescale Semiconductor
•
•
•
Normal single-chip mode
There is no external bus in this mode. The MCU program is executed from the internal memory
and no external accesses are allowed.
Special single-chip mode
This mode is generally used for debugging single-chip operation, boot-strapping or security related
operations. The active background debug mode is in control of the CPU code execution and the
BDM firmware is waiting for serial commands sent through the BKGD pin. There is no external
bus in this mode.
Emulation single-chip mode
Tool vendors use this mode for emulation systems in which the user’s target application is normal
single-chip mode. Code is executed from external or internal memory depending on the set-up of
the EROMON bit (see
is active in both cases to allow observation of internal operations (internal visibility).
Functional Description
MCU Operating Mode
Section 18.3.2.5, “MMC Control Register
MC9S12XDP512 Data Sheet, Rev. 2.17
Chapter 18 Memory Mapping Control (S12XMMCV3)
(MMCCTL1)). The external bus
671
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