mc9s08ll64 Freescale Semiconductor, Inc, mc9s08ll64 Datasheet - Page 11

• Manufacturer Part Number: mc9s08ll64
• Description: 8-bit Hcs08 Central Processor Unit
• Manufacturer: Freescale Semiconductor, Inc

where:
For most applications, P
(if P
Solving
where K is a constant pertaining to the particular part. K can be determined from
P
solving
3.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be taken to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification, ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless instructed otherwise in the device
specification.
Freescale Semiconductor
D
(at equilibrium) for a known T
I/O
T
θ
P
P
P
JA
D
int
I/O
A
is neglected) is:
Equation 1
= Ambient temperature, °C
= P
Equation 1
= Package thermal resistance, junction-to-ambient, °C/W
= I
= Power dissipation on input and output pins — user determined
ESD Protection and Latch-Up Immunity
int
DD
body model
Charge
Human
Model
device
model
+ P
× V
I/O
DD
and
and
, Watts — chip internal power
Series resistance
Storage capacitance
Number of pulses per pin
Series resistance
Storage capacitance
Number of pulses per pin
Equation 2
I/O
Equation 2
<< P
Table 6. ESD and Latch-up Test Conditions
int
K = P
Description
MC9S08LL64 Series MCU Data Sheet, Rev. 4
A
and can be neglected. An approximate relationship between P
iteratively for any value of T
. Using this value of K, the values of P
for K gives:
D
P
T
× (T
D
J
= K ÷ (T
= T
A
+ 273°C) + θ
A
+ (P
J
+ 273°C)
D
× θ
Symbol
JA
R1
R1
JA
—
—
C
C
)
× (P
D
A
)
.
2
ESD Protection and Latch-Up Immunity
Value
1500
100
200
D
3
0
3
and T
Equation 3
J
can be obtained by
Unit
pF
pF
Ω
Ω
by measuring
D
and T
Eqn. 1
Eqn. 2
Eqn. 3
11
J