mc9s08ac32 Freescale Semiconductor, Inc, mc9s08ac32 Datasheet - Page 181

• Manufacturer Part Number: mc9s08ac32
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

The following sections contain initialization examples for various configurations.
Important configuration information is repeated here for reference.
1
Freescale Semiconductor
1
2
SCM — self-clocked mode (FLL bypassed
internal)
FBE — FLL bypassed external
FEI — FLL engaged internal
FEE — FLL engaged external
Ensure that
MFD Value
Range values are given for an assumed RFD = 1. Changing the RFD allows for a lower minimum frequency.
The IRG typically consumes 100 µA. The FLL and DCO typically consumes 0.5 to 2.5 mA, depending upon output frequency.
For minimum power consumption and minimum jitter, choose N and R to be as small as possible.
Bypassed
Engaged
FLL
FLL
000
001
010
f
ICGDCLK
Clock Scheme
Hexadecimal values designated by a preceding $, binary values designated
by a preceding %, and decimal values have no preceding character.
FEI
4 MHz < f
Medium power (will be less than FEE if oscillator
range = high)
Good clock accuracy (After IRG is trimmed)
Lowest system cost (no external components
required)
IRG is on. DCO is on.
SCM
This mode is mainly provided for quick and reliable
system startup.
3 MHz < f
3 MHz < f
Medium power
Poor accuracy.
IRG is off. DCO is on and open loop.
Multiplication Factor (N)
, which is equal to
Clock Reference Source = Internal
Bus
Bus
Bus
< 20 MHz.
< 5 MHz (default).
< 20 MHz (via filter bits).
Table 10-11. ICGOUT Frequency Calculation Options
Table 10-10. ICG Configuration Consideration
4
6
8
Table 10-12. MFD and RFD Decode Table
2
1
MC9S08AC60 Series Data Sheet, Rev. 2
f
ICGOUT
1
(f
IRG
* R, does not exceed f
f
ext
f
ICGDCLK
/ 7)* 64 * N / R
f
1
ICGOUT
f
* P * N / R
ext
NOTE
/ R
/ R
1
FEE
4 MHz < f
Medium power (will be less than FEI if oscillator
range = low)
High clock accuracy
Medium/High system cost (crystal, resonator or
external clock source required)
IRG is off. DCO is on.
FBE
f
used.
Lowest power
Highest clock accuracy
Medium/High system cost (Crystal, resonator or
external clock source required)
IRG is off. DCO is off.
RFD
Bus
000
001
010
Range = 0 ; P = 64
Range = 1; P = 1
ICGDCLKmax
range ≤ 8 MHz when crystal or resonator is
Clock Reference Source = External
Chapter 10 Internal Clock Generator (S08ICGV4)
Bus
NA
NA
64
P
< 20 MHz.
.
Division Factor (R)
1
Typical f
immediately after reset
Typical f
÷1
÷2
÷4
ICGOUT
IRG
Note
= 243 kHz
= 8 MHz
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