c8051t617 Silicon Laboratories, c8051t617 Datasheet - Page 8

• Manufacturer Part Number: c8051t617
• Description: Mixed Signal Byte-programmable Eprom Mcu
• Manufacturer: Silicon Laboratories

C8051T610/1/2/3/4/5/6/7
11. EPROM Program Memory
12. External RAM
13. Oscillators
14. Port Input/Output
15. SMBus
16. UART0
17. Enhanced Serial Peripheral Interface (SPI0)
18. Timers
8
Figure 11.1. EPROM Program Memory Map ......................................................... 107
Figure 13.1. Oscillator Diagram.............................................................................. 110
Figure 14.1. Port I/O Functional Block Diagram ..................................................... 116
Figure 14.2. Port I/O Cell Block Diagram ............................................................... 117
Figure 14.3. Crossbar Priority Decoder with No Pins Skipped ............................... 118
Figure 14.4. Crossbar Priority Decoder with Two Pins Skipped............................. 119
Figure 15.1. SMBus Block Diagram ....................................................................... 131
Figure 15.2. Typical SMBus Configuration ............................................................. 132
Figure 15.3. SMBus Transaction ............................................................................ 133
Figure 15.4. Typical SMBus SCL Generation......................................................... 137
Figure 15.5. Typical Master Transmitter Sequence................................................ 143
Figure 15.6. Typical Master Receiver Sequence.................................................... 144
Figure 15.7. Typical Slave Receiver Sequence...................................................... 145
Figure 15.8. Typical Slave Transmitter Sequence.................................................. 146
Figure 16.1. UART0 Block Diagram ....................................................................... 149
Figure 16.2. UART0 Baud Rate Logic .................................................................... 150
Figure 16.3. UART Interconnect Diagram .............................................................. 151
Figure 16.4. 8-Bit UART Timing Diagram............................................................... 151
Figure 16.5. 9-Bit UART Timing Diagram............................................................... 152
Figure 16.6. UART Multi-Processor Mode Interconnect Diagram .......................... 153
Figure 17.1. SPI Block Diagram ............................................................................. 157
Figure 17.2. Multiple-Master Mode Connection Diagram ....................................... 160
Figure 17.3. 3-Wire Single Master and Slave Mode Connection Diagram ............. 160
Figure 17.4. 4-Wire Single Master and Slave Mode Connection Diagram ............. 160
Figure 17.5. Master Mode Data/Clock Timing ........................................................ 162
Figure 17.6. Slave Mode Data/Clock Timing (CKPHA = 0) .................................... 163
Figure 17.7. Slave Mode Data/Clock Timing (CKPHA = 1) .................................... 163
Figure 17.8. SPI Master Timing (CKPHA = 0)........................................................ 167
Figure 17.9. SPI Master Timing (CKPHA = 1)........................................................ 167
Figure 17.10. SPI Slave Timing (CKPHA = 0)........................................................ 168
Figure 17.11. SPI Slave Timing (CKPHA = 1)........................................................ 168
Figure 18.1. T0 Mode 0 Block Diagram.................................................................. 171
Figure 18.2. T0 Mode 2 Block Diagram.................................................................. 172
Figure 18.3. T0 Mode 3 Block Diagram.................................................................. 173
Figure 18.4. Timer 2 16-Bit Mode Block Diagram .................................................. 178
Figure 18.5. Timer 2 8-Bit Mode Block Diagram .................................................... 179
Figure 18.6. Timer 3 16-Bit Mode Block Diagram .................................................. 182
Rev. 0.3