z8f1621 ZiLOG Semiconductor, z8f1621 Datasheet - Page 220

• Manufacturer Part Number: z8f1621
• Description: High Performance 8-bit Microcontrollers
• Manufacturer: ZiLOG Semiconductor

Table 103. OCD Status Register (OCDSTAT)
PS019921-0308
BITS
FIELD
RESET
R/W
OCD Status Register
IDLE
0 = BRK instruction sets DBGMODE to 1.
1 = eZ8 CPU loops on BRK instruction.
Reserved
These bits are reserved and must be 0.
RST—Reset
Setting this bit to 1 resets the Z8 Encore! XP
through a normal Power-On Reset sequence with the exception that the On-Chip Debug-
ger is not reset. This bit is automatically cleared to 0 when the reset finishes.
0 = No effect
1 = Reset the Z8 Encore! XP
The OCD Status register
the debugger and the system.
IDLE—CPU idling
This bit is set if the part is in DEBUG mode (DBGMODE is 1), or if a BRK instruction
occurred since the last time OCDCTL was written. This can be used to determine if the
CPU is running or if it is idling.
0 = The eZ8 CPU is running.
1 = The eZ8 CPU is either stopped or looping on a BRK instruction.
HALT—HALT Mode
0 = The device is not in HALT mode.
1 = The device is in HALT mode.
RPEN—Read Protect Option Bit Enabled
0 = The Read Protect Option Bit is disabled (1).
1 = The Read Protect Option Bit is enabled (0), disabling many OCD commands.
Reserved
These bits are always 0.
7
HALT
6
RPEN
5
(Table
®
F64XX Series device
103) reports status information about the current state of
4
R
0
®
F64XX Series devices. The devices go
3
Z8 Encore! XP
Reserved
2
Product Specification
1
®
On-Chip Debugger
F64XX Series
0
206