z8f083a ZiLOG Semiconductor, z8f083a Datasheet - Page 111

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z8f083a

Manufacturer Part Number
z8f083a
Description
High-performance 8-bit Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet

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Table 63. Sample Settling Time (ADCSST)
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
Bit
Position
[7:4]
[3:0]
SST
Sample Settling Time Register
Value
(H)
0h
0h - Fh
7
The sample settling time register, listed in
SAMPLE/HOLD signal is asserted before the START signal is asserted, which begins the
conversion. The number of clock cycles required for settling will vary from system to
system depending on the system clock period used. The system designer must program
this register to contain the number of clocks required to meet a 0.5 µs minimum settling
time.
Description
Reserved - Must be 0.
Sample settling time in number of system clock periods to meet 0.5 µs minimum.
6
Reserved
R
0
5
4
F74H
Table
3
1
63, is used to program the delay after the
Z8 Encore!
2
1
SST
R/W
Product Specification
Analog-to-Digital Converter
1
1
®
F083A Series
0
1
99

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