z8f0822 ZiLOG Semiconductor, z8f0822 Datasheet - Page 89
z8f0822
Manufacturer Part Number
z8f0822
Description
High Performance 8-bit Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8F0822.pdf
(264 pages)
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PS022517-0508
4. If required, enable the timer interrupt and set the timer interrupt priority by writing to
5. If using the Timer Output function, configure the associated GPIO port pin for the
6. Write to the Timer Control Register to enable the timer and initiate counting
In COMPARE mode, the system clock always provides the timer input. The
Compare time is calculated by the following equation:
GATED Mode
In GATED mode, the timer counts only when the Timer Input signal is in its active state
(asserted), as determined by the TPOL bit in the Timer Control Register. When the Timer
Input signal is asserted, counting begins. A timer interrupt is generated when the Timer
Input signal is deasserted or a timer reload occurs. To determine if a Timer Input signal
deassertion generated the interrupt, read the associated GPIO input value and compare to
the value stored in the TPOL bit.
The timer counts up to the 16-bit Reload value stored in the Timer Reload High and Low
Byte Registers. The timer input is the system clock. When reaching the Reload value, the
timer generates an interrupt, the count value in the Timer High and Low Byte Registers is
reset to
Also, if the Timer Output alternate function is enabled, the Timer Output pin changes state
(from Low to High or from High to Low) at timer reset.
Follow the steps below for configuring a timer for GATED mode and initiating the count:
1. Write to the Timer Control Register to:
2. Write to the Timer High and Low Byte Registers to set the starting count value. This
3. Write to the Timer Reload High and Low Byte Registers to set the Reload value
4. If desired, enable the timer interrupt and set the timer interrupt priority by writing to
5. Configure the associated GPIO port pin for the Timer Input alternate function
6. Write to the Timer Control Register to enable the timer
7. Assert the Timer Input signal to initiate the counting
Compare Mode Time (s)
the relevant interrupt registers
Timer Output alternate function
–
–
–
only affects the first pass in GATED mode. After the first timer reset in GATED mode,
counting always begins at the reset value of
the relevant interrupt registers
0001H
Disable the timer
Configure the timer for GATED mode
Set the prescale value
and counting resumes (assuming the Timer Input signal is still asserted).
=
(
------------------------------------------------------------------------------------------------------------ -
Compare Value Start Value
System Clock Frequency (Hz)
–
0001H
Z8 Encore! XP
)
x
Prescale
Product Specification
®
F0822 Series
Timers
76
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